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[Qemu-arm] [PATCH 18/19] aspeed/smc: inject errors in DMA checksum
From: |
Cédric Le Goater |
Subject: |
[Qemu-arm] [PATCH 18/19] aspeed/smc: inject errors in DMA checksum |
Date: |
Sat, 25 May 2019 17:12:40 +0200 |
Emulate read errors in the DMA Checksum Register for high frequencies
and optimistic settings of the Read Timing Compensation Register. This
will help in tuning the SPI timing calibration algorithm.
The values below are those to expect from the first flash device of
the FMC controller of a palmetto-bmc machine.
Signed-off-by: Cédric Le Goater <address@hidden>
---
hw/ssi/aspeed_smc.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 406c30c60b3f..4c162912cf62 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -866,6 +866,30 @@ static void aspeed_smc_dma_calibration(AspeedSMCState *s)
s->regs[s->r_ctrl0 + cs] |= CE_CTRL_CLOCK_FREQ(hclk_div);
}
+static bool aspeed_smc_inject_read_failure(AspeedSMCState *s)
+{
+ uint8_t delay =
+ (s->regs[R_DMA_CTRL] >> DMA_CTRL_DELAY_SHIFT) & DMA_CTRL_DELAY_MASK;
+ uint8_t hclk_mask =
+ (s->regs[R_DMA_CTRL] >> DMA_CTRL_FREQ_SHIFT) & DMA_CTRL_FREQ_MASK;
+
+ /*
+ * Typical values of a palmetto-bmc machine.
+ */
+ switch (aspeed_smc_hclk_divisor(hclk_mask)) {
+ case 4 ... 16:
+ return false;
+ case 3: /* at least one HCLK cycle delay */
+ return (delay & 0x7) < 1;
+ case 2: /* at least two HCLK cycle delay */
+ return (delay & 0x7) < 2;
+ case 1: /* (> 100MHz) is above the max freq of the controller */
+ return true;
+ default:
+ g_assert_not_reached();
+ }
+}
+
/*
* Accumulate the result of the reads to provide a checksum that will
* be used to validate the read timing settings.
@@ -903,6 +927,11 @@ static void aspeed_smc_dma_checksum(AspeedSMCState *s)
s->regs[R_DMA_FLASH_ADDR] += 4;
s->regs[R_DMA_LEN] -= 4;
}
+
+ if (aspeed_smc_inject_read_failure(s)) {
+ s->regs[R_DMA_CHECKSUM] = 0xbadc0de;
+ }
+
}
static void aspeed_smc_dma_rw(AspeedSMCState *s)
--
2.20.1
- [Qemu-arm] [PATCH 04/19] hw: timer: Add ASPEED RTC device, (continued)
- [Qemu-arm] [PATCH 04/19] hw: timer: Add ASPEED RTC device, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 06/19] aspeed: introduce a configurable number of CPU per machine, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 07/19] aspeed: add support for multiple NICs, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 08/19] aspeed/timer: Fix behaviour running Linux, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 09/19] aspeed/timer: Status register contains reload for stopped timer, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 10/19] aspeed/timer: Fix match calculations, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 11/19] aspeed/timer: Provide back-pressure information for short periods, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 19/19] aspeed/smc: Calculate checksum on normal DMA, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 18/19] aspeed/smc: inject errors in DMA checksum,
Cédric Le Goater <=
- [Qemu-arm] [PATCH 17/19] aspeed/smc: add DMA calibration settings, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 15/19] aspeed: add a RAM memory region container, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 16/19] aspeed/smc: add support for DMAs, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 14/19] aspeed: remove the "ram" link, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 13/19] aspeed/smc: add a 'sdram_base' propertie, Cédric Le Goater, 2019/05/25
- [Qemu-arm] [PATCH 12/19] aspeed/timer: Ensure positive muldiv delta, Cédric Le Goater, 2019/05/25