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[Qemu-arm] [PATCH v2 0/2] hw/intc/arm_gicv3: Some simple bugfixes


From: Peter Maydell
Subject: [Qemu-arm] [PATCH v2 0/2] hw/intc/arm_gicv3: Some simple bugfixes
Date: Fri, 24 May 2019 13:42:46 +0100

This patchset fixes a couple of simple bugs in our GICv3
implementation.

Changes since v1:
 * patches 3 and 4 from the old patchset are now in master
 * patch 1 now covers both the read and write functions

I've also just noticed (via grep for IDREGS) that we made
the same decode mistake in the SMMUv3. I'll send that out
as a separate patch.

thanks
-- PMM


Peter Maydell (2):
  hw/intc/arm_gicv3: Fix decoding of ID register range
  hw/intc/arm_gicv3: GICD_TYPER.SecurityExtn is RAZ if GICD_CTLR.DS == 1

 hw/intc/arm_gicv3_dist.c   | 12 +++++++++---
 hw/intc/arm_gicv3_redist.c |  4 ++--
 2 files changed, 11 insertions(+), 5 deletions(-)

-- 
2.20.1




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