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Re: [Qemu-arm] [Qemu-devel] [PATCH] target/arm: Implement NSACR gating o
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH] target/arm: Implement NSACR gating of floating point |
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Date: |
Mon, 15 Apr 2019 09:34:24 +0100 |
On Sun, 14 Apr 2019 at 20:40, Richard Henderson
<address@hidden> wrote:
>
> On 4/14/19 8:02 AM, Peter Maydell wrote:
> > There's similar wording for the effect of NSACR on CPACR, so
> > again I think we need to actually make the bits RAZ/WI
> > regardless of their underlying value, not just force them
> > to 0.
>
> I don't see that language for CPACR, just "the corresponding bits in the CPACR
> ignore writes and read as 0b00". I'm willing to believe the manual is sloppy
> on this point though, and the "correct" language appears only once, somewhere.
It's in the documentation of CPACR cp10/cp11.
thanks
-- PMM