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Re: [Qemu-arm] [PATCH 2/3] aspeed: add a per SoC mapping for the memory


From: Andrew Jeffery
Subject: Re: [Qemu-arm] [PATCH 2/3] aspeed: add a per SoC mapping for the memory space
Date: Thu, 11 Apr 2019 23:24:54 -0400
User-agent: Cyrus-JMAP/3.1.6-329-gf4aae99-fmstable-20190329v1


On Fri, 12 Apr 2019, at 11:48, Joel Stanley wrote:
> On Thu, 11 Apr 2019 at 16:10, Cédric Le Goater <address@hidden> wrote:
> >
> > This will simplify the definition of new SoCs, like the AST2600 which
> > should use a slightly different address space and have a different set
> > of controllers.
> >
> > Signed-off-by: Cédric Le Goater <address@hidden>
> 
> > diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
> > index 5bbd1fb87d18..9b601709e93c 100644
> > --- a/hw/arm/aspeed_soc.c
> > +++ b/hw/arm/aspeed_soc.c
> 
> > +static const hwaddr aspeed_soc_ast2400_memmap[] = {
> 
> > +static const hwaddr aspeed_soc_ast2500_memmap[] = {
> 
> Most of these arrays is common. And some of it will stay common in the
> 2600. Any ideas how we could avoid duplication?

I dunno, I feel that any attempt to create some "common" layout concept is
more distracting than having soc-specific, complete layouts described.

There's no reason why they're common beyond coincidence (i.e. it's at
ASPEED's whim). I think this is fine.

Reviewed-by: Andrew Jeffery <address@hidden>

> 
> This is fine for now.
> 
> Reviewed-by: Joel Stanley <address@hidden>
>



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