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[Qemu-arm] [PATCH v2 19/26] target/arm: Set PSTATE.TCO on exception entr
From: |
Richard Henderson |
Subject: |
[Qemu-arm] [PATCH v2 19/26] target/arm: Set PSTATE.TCO on exception entry |
Date: |
Sun, 10 Feb 2019 17:08:22 -0800 |
R0085 specifies that exception handlers begin with tag checks overridden.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
v2: Only set if MTE feature present.
---
target/arm/helper.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 9fac3628e5..a3ad5bc54e 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9455,6 +9455,7 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs)
target_ulong addr = env->cp15.vbar_el[new_el];
unsigned int new_mode = aarch64_pstate_mode(new_el, true);
unsigned int cur_el = arm_current_el(env);
+ unsigned int new_pstate;
/*
* Note that new_el can never be 0. If cur_el is 0, then
@@ -9548,7 +9549,11 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs)
qemu_log_mask(CPU_LOG_INT, "...with ELR 0x%" PRIx64 "\n",
env->elr_el[new_el]);
- pstate_write(env, PSTATE_DAIF | new_mode);
+ new_pstate = new_mode | PSTATE_DAIF;
+ if (cpu_isar_feature(aa64_mte, cpu)) {
+ new_pstate |= PSTATE_TCO;
+ }
+ pstate_write(env, new_pstate);
env->aarch64 = 1;
aarch64_restore_sp(env, new_el);
--
2.17.2
- [Qemu-arm] [PATCH v2 02/26] target/arm: Split helper_msr_i_pstate into 3, (continued)
- [Qemu-arm] [PATCH v2 02/26] target/arm: Split helper_msr_i_pstate into 3, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 03/26] target/arm: Add clear_pstate_bits, share gen_ss_advance, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 10/26] target/arm: Implement the IRG instruction, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 04/26] target/arm: Add MTE_ACTIVE to tb_flags, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 08/26] target/arm: Fill in helper_mte_check, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 16/26] target/arm: Implement the STGP instruction, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 15/26] target/arm: Implement LDG, STG, ST2G instructions, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 18/26] target/arm: Implement data cache set allocation tags, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 21/26] target/arm: Cache the Tagged bit for a page in MemTxAttrs, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 05/26] target/arm: Extract TCMA with ARMVAParameters, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 19/26] target/arm: Set PSTATE.TCO on exception entry,
Richard Henderson <=
- [Qemu-arm] [PATCH v2 06/26] target/arm: Add MTE system registers, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 07/26] target/arm: Assert no manual change to CACHED_PSTATE_BITS, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 22/26] target/arm: Create tagged ram when MTE is enabled, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 11/26] target/arm: Implement ADDG, SUBG instructions, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 13/26] target/arm: Implement the SUBP instruction, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 25/26] target/arm: Enable MTE, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 23/26] target/arm: Add allocation tag storage for user mode, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 26/26] tests/tcg/aarch64: Add mte smoke tests, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 12/26] target/arm: Implement the GMI instruction, Richard Henderson, 2019/02/10
- [Qemu-arm] [PATCH v2 24/26] target/arm: Add allocation tag storage for system mode, Richard Henderson, 2019/02/10