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Re: [Qemu-arm] [PATCH 01/10] target/arm: Correct typo in HAMAIR1 regdef
From: |
Luc Michel |
Subject: |
Re: [Qemu-arm] [PATCH 01/10] target/arm: Correct typo in HAMAIR1 regdef name |
Date: |
Wed, 15 Aug 2018 11:02:04 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.0 |
On 8/14/18 2:42 PM, Peter Maydell wrote:
> We implement the HAMAIR1 register as RAZ/WI; we had a typo in the
> regdef, though, and were incorrectly naming it HMAIR1 (which is
> a different register which we also implement as RAZ/WI).
>
> Signed-off-by: Peter Maydell <address@hidden>
Reviewed-By: Luc Michel <address@hidden>
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- Re: [Qemu-arm] [PATCH 07/10] target/arm: Implement ESR_EL2/HSR for AArch32 and no-EL2, (continued)
- [Qemu-arm] [PATCH 08/10] target/arm: Permit accesses to ELR_Hyp from Hyp mode via MSR/MRS (banked), Peter Maydell, 2018/08/14
- [Qemu-arm] [PATCH 03/10] target/arm: Implement RAZ/WI HACTLR2, Peter Maydell, 2018/08/14
- [Qemu-arm] [PATCH 01/10] target/arm: Correct typo in HAMAIR1 regdef name, Peter Maydell, 2018/08/14
- [Qemu-arm] [PATCH 05/10] target/arm: Implement AArch32 HCR and HCR2, Peter Maydell, 2018/08/14
- [Qemu-arm] [PATCH 04/10] target/arm: Implement AArch32 HVBAR, Peter Maydell, 2018/08/14
- [Qemu-arm] [PATCH 10/10] target/arm: Implement support for taking exceptions to Hyp mode, Peter Maydell, 2018/08/14