[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-arm] [PATCH v4 10/25] hw/arm/exynos4210: implement SDHCI Spec v2
|
From: |
Philippe Mathieu-Daudé |
|
Subject: |
[Qemu-arm] [PATCH v4 10/25] hw/arm/exynos4210: implement SDHCI Spec v2 |
|
Date: |
Wed, 3 Jan 2018 15:34:03 -0300 |
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
---
hw/arm/exynos4210.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index e8e1d81e62..0e6acac784 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -75,7 +75,6 @@
#define EXYNOS4210_INT_COMBINER_BASE_ADDR 0x10448000
/* SD/MMC host controllers */
-#define EXYNOS4210_SDHCI_CAPABILITIES 0x05E80080
#define EXYNOS4210_SDHCI_BASE_ADDR 0x12510000
#define EXYNOS4210_SDHCI_ADDR(n) (EXYNOS4210_SDHCI_BASE_ADDR + \
0x00010000 * (n))
@@ -377,8 +376,18 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
BlockBackend *blk;
DriveInfo *di;
+ /* Compatible with:
+ * - SD Host Controller Specification Version 2.0
+ * - SDIO Specification Version 2.0
+ * - MMC Specification Version 4.3
+ *
+ * - SDMA
+ * - ADMA
+ */
dev = qdev_create(NULL, TYPE_SYSBUS_SDHCI);
- qdev_prop_set_uint32(dev, "capareg", EXYNOS4210_SDHCI_CAPABILITIES);
+ qdev_prop_set_uint8(dev, "sd-spec-version", 2);
+ qdev_prop_set_bit(dev, "suspend", true);
+ qdev_prop_set_bit(dev, "1v8", true);
qdev_init_nofail(dev);
busdev = SYS_BUS_DEVICE(dev);
--
2.15.1