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[Qemu-arm] [PATCH 16/20] target/arm: Factor out "get mmuidx for specifie
From: |
Peter Maydell |
Subject: |
[Qemu-arm] [PATCH 16/20] target/arm: Factor out "get mmuidx for specified security state" |
Date: |
Fri, 22 Sep 2017 16:00:03 +0100 |
For the SG instruction and secure function return we are going
to want to do memory accesses using the MMU index of the CPU
in secure state, even though the CPU is currently in non-secure
state. Write arm_v7m_mmu_idx_for_secstate() to do this job,
and use it in cpu_mmu_index().
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/cpu.h | 32 +++++++++++++++++++++-----------
1 file changed, 21 insertions(+), 11 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 70c1f85..89d49cd 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2329,23 +2329,33 @@ static inline int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx)
}
}
+/* Return the MMU index for a v7M CPU in the specified security state */
+static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env,
+ bool secstate)
+{
+ int el = arm_current_el(env);
+ ARMMMUIdx mmu_idx;
+
+ if (el == 0) {
+ mmu_idx = secstate ? ARMMMUIdx_MSUser : ARMMMUIdx_MUser;
+ } else {
+ mmu_idx = secstate ? ARMMMUIdx_MSPriv : ARMMMUIdx_MPriv;
+ }
+
+ if (armv7m_nvic_neg_prio_requested(env->nvic, secstate)) {
+ mmu_idx = secstate ? ARMMMUIdx_MSNegPri : ARMMMUIdx_MNegPri;
+ }
+
+ return mmu_idx;
+}
+
/* Determine the current mmu_idx to use for normal loads/stores */
static inline int cpu_mmu_index(CPUARMState *env, bool ifetch)
{
int el = arm_current_el(env);
if (arm_feature(env, ARM_FEATURE_M)) {
- ARMMMUIdx mmu_idx;
-
- if (el == 0) {
- mmu_idx = env->v7m.secure ? ARMMMUIdx_MSUser : ARMMMUIdx_MUser;
- } else {
- mmu_idx = env->v7m.secure ? ARMMMUIdx_MSPriv : ARMMMUIdx_MPriv;
- }
-
- if (armv7m_nvic_neg_prio_requested(env->nvic, env->v7m.secure)) {
- mmu_idx = env->v7m.secure ? ARMMMUIdx_MSNegPri : ARMMMUIdx_MNegPri;
- }
+ ARMMMUIdx mmu_idx = arm_v7m_mmu_idx_for_secstate(env, env->v7m.secure);
return arm_to_core_mmu_idx(mmu_idx);
}
--
2.7.4
- [Qemu-arm] [PATCH 10/20] target/arm: Update excret sanity checks for v8M, (continued)
- [Qemu-arm] [PATCH 10/20] target/arm: Update excret sanity checks for v8M, Peter Maydell, 2017/09/22
- [Qemu-arm] [PATCH 09/20] target/arm: Add new-in-v8M SFSR and SFAR, Peter Maydell, 2017/09/22
- [Qemu-arm] [PATCH 11/20] target/arm: Add support for restoring v8M additional state context, Peter Maydell, 2017/09/22
- [Qemu-arm] [PATCH 12/20] target/arm: Add v8M support to exception entry code, Peter Maydell, 2017/09/22
- [Qemu-arm] [PATCH 17/20] target/arm: Implement SG instruction, Peter Maydell, 2017/09/22
- [Qemu-arm] [PATCH 20/20] nvic: Add missing code for writing SHCSR.HARDFAULTPENDED bit, Peter Maydell, 2017/09/22
- [Qemu-arm] [PATCH 02/20] target/arm: Don't switch to target stack early in v7M exception return, Peter Maydell, 2017/09/22
- [Qemu-arm] [PATCH 15/20] target/arm: Fix calculation of secure mm_idx values, Peter Maydell, 2017/09/22
- [Qemu-arm] [PATCH 13/20] nvic: Implement Security Attribution Unit registers, Peter Maydell, 2017/09/22
- [Qemu-arm] [PATCH 16/20] target/arm: Factor out "get mmuidx for specified security state",
Peter Maydell <=
- [Qemu-arm] [PATCH 14/20] target/arm: Implement security attribute lookups for memory accesses, Peter Maydell, 2017/09/22
- [Qemu-arm] [PATCH 18/20] target/arm: Implement BLXNS, Peter Maydell, 2017/09/22
- [Qemu-arm] [PATCH 19/20] target/arm: Implement secure function return, Peter Maydell, 2017/09/22