[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-arm] [PATCH 1/2] target/arm: implement armv8 PMUSERENR (user-m
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [PATCH 1/2] target/arm: implement armv8 PMUSERENR (user-mode enable bits) |
Date: |
Thu, 2 Mar 2017 15:58:41 +0000 |
On 28 February 2017 at 21:58, Andrew Baumann
<address@hidden> wrote:
> In armv8, this register implements more than a single bit, with
> fine-grained enables for read access to event counters, cycles
> counters, and write access to the software increment. This change
> implements those checks using custom access functions for the relevant
> registers.
>
> Signed-off-by: Andrew Baumann <address@hidden>
This looks good to me. Since it is a bug fix I think we can
put it into 2.9. Applied to target-arm.next.
thanks
-- PMM
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- Re: [Qemu-arm] [PATCH 1/2] target/arm: implement armv8 PMUSERENR (user-mode enable bits),
Peter Maydell <=