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Re: [Qemu-arm] [Qemu-devel] [kvm-unit-tests RFC 05/15] arm/arm64: GICv3:
From: |
Auger Eric |
Subject: |
Re: [Qemu-arm] [Qemu-devel] [kvm-unit-tests RFC 05/15] arm/arm64: GICv3: add cpu count |
Date: |
Tue, 6 Dec 2016 11:04:48 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 |
Hi Andre, Drew,
On 06/12/2016 10:32, Andre Przywara wrote:
> Hi,
>
> On 06/12/16 09:29, Andrew Jones wrote:
>> On Mon, Dec 05, 2016 at 10:46:36PM +0100, Eric Auger wrote:
>>> Add a new cpu_count field in gicv3_data indicating the
>>> number of redistributors. This will be useful for enumeration
>>> of their resources such as LPI pending tables.
>>
>> I'm fine with the additional state, but just curious, will it
>> ever be possible for gicv3.cpu_count != nr_cpus?
>
> If not you are in trouble, so that should in fact be one test.
>
> Which brings me to my comment ...
>
>>>
>>> Signed-off-by: Eric Auger <address@hidden>
>>> ---
>>> lib/arm/asm/gic-v3.h | 1 +
>>> lib/arm/gic-v3.c | 2 ++
>>> 2 files changed, 3 insertions(+)
>>>
>>> diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h
>>> index ed330af..039b7c2 100644
>>> --- a/lib/arm/asm/gic-v3.h
>>> +++ b/lib/arm/asm/gic-v3.h
>>> @@ -58,6 +58,7 @@ struct gicv3_data {
>>> void *dist_base;
>>> void *redist_base[NR_CPUS];
>>> unsigned int irq_nr;
>>> + unsigned int cpu_count;
>
> Should that be called "nr_redists" or the like?
> Since this is what it counts in the code below.
> Later we can then compare this with nr_cpus to check for a match.
I fully agree with you suggestion.
Thanks
Eric
>
> Cheers,
> Andre.
>
>>> };
>>> extern struct gicv3_data gicv3_data;
>>>
>>> diff --git a/lib/arm/gic-v3.c b/lib/arm/gic-v3.c
>>> index 6246221..9921f4d 100644
>>> --- a/lib/arm/gic-v3.c
>>> +++ b/lib/arm/gic-v3.c
>>> @@ -12,12 +12,14 @@ void gicv3_set_redist_base(size_t stride)
>>> void *ptr = gicv3_data.redist_base[0];
>>> u64 typer;
>>>
>>> + gicv3_data.cpu_count = 0;
>>> do {
>>> typer = gicv3_read_typer(ptr + GICR_TYPER);
>>> if ((typer >> 32) == aff) {
>>> gicv3_redist_base() = ptr;
>>> return;
>>> }
>>> + gicv3_data.cpu_count++;
>>> ptr += stride; /* skip RD_base, SGI_base, etc. */
>>> } while (!(typer & GICR_TYPER_LAST));
>>>
>>> --
>>> 2.5.5
>>>
>>>
> --
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>
- [Qemu-arm] [kvm-unit-tests RFC 00/15] arm/arm64: add ITS framework, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 01/15] libcflat: Add other size defines, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 02/15] arm/arm64: gicv3: Add some re-distributor defines, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 03/15] arm/arm64: ITS skeleton, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 04/15] arm/arm64: ITS: BASER parsing and setup, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 05/15] arm/arm64: GICv3: add cpu count, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 06/15] arm/arm64: ITS: Set the LPI config and pending tables, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 07/15] arm/arm64: ITS: Init the command queue, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 08/15] arm/arm64: ITS: enable LPIs at re-distributor level, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 09/15] arm/arm64: ITS: Parse the typer register, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 10/15] arm/arm64: ITS: its_enable_defaults, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 11/15] arm/arm64: ITS: create device, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 12/15] arm/arm64: ITS: create collection, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 13/15] arm/arm64: ITS: commands, Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 14/15] arm/arm64: gic: Generalize ipi_enable(), Eric Auger, 2016/12/05
- [Qemu-arm] [kvm-unit-tests RFC 15/15] arm/arm64: ITS test, Eric Auger, 2016/12/05