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[PATCH 1/1] pickles: Add new PCI Pickle


From: Darshit Shah
Subject: [PATCH 1/1] pickles: Add new PCI Pickle
Date: Tue, 17 Sep 2024 20:33:42 +0200

This is a WIP pickle for defining the PCI Config Space.
At the moment, we use the definitions in the PCIe Base Specification
Revision 5 (PCIe 5) specification document.
The current commit only adds a mapping for the base config space.
Detailed descriptions of the various capabilities will come later.
---
 pickles.org               |   2 +
 pickles/pci/pci.pk        | 144 ++++++++++++++++++++++++++++++++++++++
 pickles/pci/pci_common.pk |  39 +++++++++++
 3 files changed, 185 insertions(+)
 create mode 100644 pickles/pci/pci.pk
 create mode 100644 pickles/pci/pci_common.pk

diff --git a/pickles.org b/pickles.org
index 027ca82..7626f50 100644
--- a/pickles.org
+++ b/pickles.org
@@ -145,6 +145,8 @@ know in mailto:poke-devel@gnu.org.
   
|-------------+------------------------------+-----------------------------------------------------------------------------|
   | openpgp.pk  | OpenPGP RFC 4880 (GnuPG etc) | 
https://git.ageinghacker.net/git/cgit.cgi/pokology/tree/pickles/openpgp.pk  |
   
|-------------+------------------------------+-----------------------------------------------------------------------------|
+  | pci.pk      | PCI Config Space             | 
https://git.ageinghacker.net/git/cgit.cgi/pokology/tree/pickes/pci/pci.pk   |
+  
|-------------+------------------------------+-----------------------------------------------------------------------------|
   | tzif.pk     | Timezone Information Format  | 
https://git.ageinghacker.net/git/cgit.cgi/pokology/tree/pickles/tzif.pk     |
   
|-------------+------------------------------+-----------------------------------------------------------------------------|
   | uimage.pk   | U-Boot Image Format          | 
https://git.ageinghacker.net/git/cgit.cgi/pokology/tree/pickles/uimage.pk   |
diff --git a/pickles/pci/pci.pk b/pickles/pci/pci.pk
new file mode 100644
index 0000000..10fb5ac
--- /dev/null
+++ b/pickles/pci/pci.pk
@@ -0,0 +1,144 @@
+/* pci.pk - PCI Config Space (PCI Base Specification v5) */
+
+/* Work in progress */
+
+/* Copyright (C) 2024 Darshit Shah */
+
+/* This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* PCI Express Base Specification v5
+ *
+ * https://pcisig.com/pci-express-base-specification-revision-50-version-10
+ * https://en.wikipedia.org/wiki/PCI_configuration_space
+ *
+ * This pickle implements a mapping over the PCI Base Config Space as defined
+ * in revision 5.0 of the specification.
+ */
+
+/* set_endian (ENDIAN_LITTLE); */
+
+load "pci_common.pk";
+
+type PCI_Command = struct reg_16 {
+    rsvdz;
+    rsvdz;
+    rsvdz;
+    rsvdz;
+    rsvdz;
+    bit int_disable;
+    bit fast_b2b_tx_enable == 0b0;
+    bit serr_enable;
+    bit idsel_stepping == 0b0;
+    bit parity_error_response;
+    bit vga_palette_snoop == 0b0;
+    bit mem_write_invalidate == 0b0;
+    bit sp_cycle_enable == 0b0;
+    bit bus_master_enable;
+    bit mem_enable;
+    bit io_enable;
+};
+
+type PCI_Status = struct reg_16 {
+    bit parity_error;
+    bit sig_sys_error;
+    bit rcvd_master_abort;
+    bit rcvd_target_abort;
+    bit sig_target_abort;
+    uint<2> devsel_timing == 0 as uint<2>;
+    bit master_data_parity_error;
+    bit fast_b2b_tx_cap;
+    rsvdz;
+    bit Mhz66_cap == 0b0;
+    bit cap_list;
+    bit int_status;
+    rsvdz;
+    rsvdz;
+    bit imm_readiness;
+};
+
+type PCI_Hdr_Type = struct reg_8 {
+    uint<7> hdr_layout;
+    bit multi_fn;
+};
+
+type PCI_BAR = struct {
+    reg_32;
+};
+
+type PCI_Type0 = struct {
+    PCI_BAR[6] bars;
+    reg_32 cardbus_cis_ptr == 0x0U;
+    reg_16 subsystem_vendor_id;
+    reg_16 subsystem_id;
+    reg_32 exp_rom_base_addr;
+    offset<reg_8,B> cap_ptr;
+    uint<56> rsvdz == 0;
+    reg_8 int_line;
+    reg_8 int_pin;
+    reg_8 min_gnt;
+    reg_8 max_lat;
+};
+
+type PCI_Type1  = struct {
+    PCI_BAR bar_0;
+    PCI_BAR bar_1;
+    reg_8 primary_bus_nr;
+    reg_8 sec_bus_nr;
+    reg_8 sub_bus_nr;
+    reg_8 sec_lat_timer;
+    reg_8 io_base;
+    reg_8 io_limit;
+    reg_16 sec_status;
+    reg_16 mem_base;
+    reg_16 mem_limit;
+    reg_16 prefetch_mem_base;
+    reg_16 prefetch_mem_limit;
+    reg_32 prefetch_mem_base_upper;
+    reg_32 prefetch_mem_limit_upper;
+    reg_16 io_base_upper;
+    reg_16 io_base_limit;
+    offset<reg_16,B> cap_ptr;
+    uint<24> rsvdz == 0;
+    reg_32 exp_rom_base;
+    reg_8 int_line;
+    reg_8 int_pin;
+    reg_16 bridge_ctrl;
+};
+
+
+type PCI_Config_Space = struct {
+    reg_16 vendor;
+    reg_16 device;
+    PCI_Command command;
+    PCI_Status status;
+    reg_8 revision_id;
+    uint<24> class_code;
+    reg_8 cache_line_size;
+    reg_8 pri_lat_timer == 0;
+    PCI_Hdr_Type header;
+    reg_8 BIST;
+    if (header.hdr_layout == 0b0)
+        PCI_Type0 endpt_specific_data;
+    if (header.hdr_layout == 0b1)
+        PCI_Type1 bridge_specific_data;
+    // These are technically not a part of Type 0 / Type 1 structures
+    // But I define them in there for ease. Instead, we can use Field Labels
+    // to create virtual fields here that point to the correct data
+    reg_8 cap_ptr @ 0x34#B;
+    reg_8 int_line @ 0x3C#B;
+    reg_8 int_pin @ 0x3D#B;
+};
+
+assert ((PCI_Config_Space {})'size == 0x40#B);
diff --git a/pickles/pci/pci_common.pk b/pickles/pci/pci_common.pk
new file mode 100644
index 0000000..4e91745
--- /dev/null
+++ b/pickles/pci/pci_common.pk
@@ -0,0 +1,39 @@
+/* pci_common.pk - Common Definitions for reuse in PCI pickles */
+
+/* Work in progress */
+
+/* Copyright (C) 2024 Darshit Shah */
+
+/* This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+
+/**
+ * Basic Registers
+ */
+type reg_32 = uint<32>;
+type reg_16 = uint<16>;
+type reg_8 = uint<8>;
+
+//  While the PCI base specification differentiates between RsvdZ and RsvdP, we
+//  don't need that in Poke. The only difference between the two is what 
happens
+//  when you write to the bit, which is not something our representation needs
+//  to care about.
+type rsvdz = struct bit {
+    bit rsvdz == 0x0;
+    method _print = void:
+    {
+        print "rsvdz: 0";
+    }
+};
-- 
2.46.1




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