Re: [lwip-users] Problem running lwip on cortex M7 with D cache enabled

[Jochen Strohbeck]

Jan Menzel:
> Did you check the performance for your system? I suppose with buffers in
> non-cached memory you do not have any benefits of the d-cache. If you
> can't get any of the options I suggested to run, you still might use
> dedicated non-cached RX buffers in the driver and copy received data
> into cached LWIP memory. This way the processing of all the headers will
> still benefit from the d-cache even though you have the extra work of
> coping the data.

My current focus is to improve overall system performance e.g. data
processing using float maths, interrupt handling, SPI communication etc.
This 'core' is about 5x faster if I can enable the cache.

Network performance is not that important - yet. I've implemented cache
management by using explicit DMA cache flush / invalidate by address for
XDMAC/SPI but at the moment I do not have the time and especially
knowledge in lwip to implement that for networking too. Therefore I
decided to use lwip code 'as is' and only placed descriptors and buffers
into non-cached area what seems to be at least not slower than before
and suits my needs at the moment.

Therefore I did not spent much time to study or implement all options
discussed here but I really appreciate any comments in order to improve
networking in the near future. To achieve this I'll have to update lwip
to 2.x first. For productive system I'm afraid that I have to claim on
1.4.1 for now.