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RE: [lwip-users] Problem With dns.c Using 32-Bit Compilers


From: John Keil
Subject: RE: [lwip-users] Problem With dns.c Using 32-Bit Compilers
Date: Fri, 18 Jan 2008 09:52:39 -0500

>>> The problem with these DSP is that whatever the size of the operand,
>>> (8, 16 or 32 bits), the compiler allways use 32bit "accesses". This is
>>> due to the fact that these DSPs can manipulate only 32bit registers.
>>> Memory accesses are also only 32bit accesses.

>> Despite the optimal width of memory accesses the C6x does support a
>> load byte (ldb) instruction (very possibly implemented in silicon as a
>> 32-bit read with a mask and shift to cope with the memory access
>> constraints).  Either way, it doesn't prevent a compiler supporting a
>> packed structure and knowing it will have to assume it and all its
>> members are potentially unaligned.

> Many processors I know don't support 8-bit or unaligned operations.
> However, the compiler fakes this: e.g. loading unaligned is done by
> loading twice, masking and shifting into one register.

I agree, it seems this is something TI could have worked around.
Nonetheless,
they have not, and users of their DSP's have to deal with it.  We've been
very fortunate that we are able to use 99% of lwIP as-is, just by careful
selection of buffer sizes that cause the correct alignment for our platform.

My original post was not asking for any particular support for the TI DSPs
(I realize we have a pretty unique set of problems).  I thought the original
issue (sizeof(struct dns_answer) reporting 12 instead of 10) may have
applied
to others as well.

John Keil





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