/*
 * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
 * SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR
 * XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION
 * AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION
 * OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS
 * IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
 * AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
 * FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY
 * WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
 * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
 * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
 * INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE.
 *     
 * (c) Copyright 2002, 2003 Xilinx, Inc.
 * All rights reserved.
 *
 */

/*
 * Copyright (c) 2001, 2002, 2003 Swedish Institute of Computer Science.
 * All rights reserved. 
 * 
 * Redistribution and use in source and binary forms, with or without 
 * modification, are permitted provided that the following conditions 
 * are met:
 *
 * 1. Redistributions of source code must retain the above copyright notice,
 *    this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright notice,
 *    this list of conditions and the following disclaimer in the documentation
 *    and/or other materials provided with the distribution.
 * 3. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission. 
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 
 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

/* Xilinx Includes */
#include "xuartlite.h"
#include "xparameters.h"
#include "xintc.h"
#include "xtmrctr_l.h"

/* lwIP Includes */
#include "netif/xemacif.h"
#include "lwip/tcp.h"
#include "lwip/memp.h"
#include "netif/etharp.h"

#include "TxTest.h"

#define LWIP_TIMER_CYCLES (XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ / 1000 \
                           * TCP_TMR_INTERVAL )

// Upper 6 bytes of MAC - Xilinx Ethernet OUI = 00-0A-35
#define XILINX_MAC_OUI0 0x00
#define XILINX_MAC_OUI1 0x00
#define XILINX_MAC_OUI2 0x00


static void show_dotted_decimal( char * address_array);
static void show_dashed_hex( int bytes, char *address_array);

// Static Global Variables
static u8_t my_timer = 0;
static int waiting_for_timer = 1;

// External Global Variables

/* defined in lwip/src/core/tcp.c */
extern u32_t tcp_ticks; 
/* defined in EDK generated xemacif_g.c file */
extern XEmacIf_Config XEmacIf_ConfigTable[]; 


/*---------------------------------------------------------------------------*/
// show dotted decimal prints a dotted decimal address to the UART           */
/*---------------------------------------------------------------------------*/
static void show_dotted_decimal( char *address_array)
{
   int bb;
   unsigned char temp;

   for(bb=0;bb<4;bb++)
   {
      temp = address_array[bb];
      if(bb!=0) xil_printf(".");
      xil_printf("%d", temp);      
   }
}

/*---------------------------------------------------------------------------*/
/* show dashed hex prints a dashed hex address to the UART                   */
/*---------------------------------------------------------------------------*/
static void show_dashed_hex( int bytes, char *address_array)
{
   //Assumes the caller passes the correct number of bytes
   int bb;

   for(bb=0;bb<bytes;bb++)
   {
      if(bb !=0) xil_printf("-");
      xil_printf("%02X", (int) address_array[bb]);
   }
}

/*---------------------------------------------------------------------------*/
/* my_tmr - Called Periodically to dispatch TCP and ARP timers               */
/*---------------------------------------------------------------------------*/
void my_tmr(void)
{
   ++my_timer;

   if(my_timer == 10) {
      my_timer = 0;
   }
   if(my_timer & 1) {
      /* Call tcp_fasttmr() every 2 ms, i.e.,
       * every other timer my_tmr() is called. */
      tcp_fasttmr();
   }
   if(my_timer == 0 || my_timer == 5) {
      /* Call tcp_slowtmr() every 5 ms, i.e.,
       * every fifth timer my_tmr() is called. */
      tcp_slowtmr();
      if (tcp_ticks%2000 == 0)
         /* Call etharp_tmr() every 20th call to tcp_slowtmr().
          * tcp_ticks is a global var defined in core/tcp.c */
         etharp_tmr();
   }
}

/*---------------------------------------------------------------------------*/
/* new_my_tmr - Called Periodically to dispatch TCP and ARP timers               */
/*---------------------------------------------------------------------------*/
void new_my_tmr(void)
{
  tcp_tmr();
  etharp_tmr();
}

/*---------------------------------------------------------------------------*/
/* print_app_header - prints the legal header                                */
/*---------------------------------------------------------------------------*/
void print_app_header()
{
   xil_printf("\n\n\n\n\n\n\n\n\r\n");
   xil_printf("####################################################################\r\n");
   xil_printf("# Xilinx TCP/IP Demo Application (TXTEST  Server)                  #\r\n");
   xil_printf("#                                                                  #\r\n");
   xil_printf("# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION \"AS IS\"  #\r\n");
   xil_printf("# SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR          #\r\n");
   xil_printf("# XILINX DEVICES.                                                  #\r\n");
   xil_printf("#                                                                  #\r\n");
   xil_printf("# (c) Copyright 2003, 2003 Xilinx, Inc.                            #\r\n");
   xil_printf("# All rights reserved.                                             #\r\n");
   xil_printf("#                                                                  #\r\n");
   xil_printf("####################################################################\r\n");
}


/*---------------------------------------------------------------------------*/
/* main function                                                             */
/*---------------------------------------------------------------------------*/
int main_main ()
{
   struct ip_addr ipaddr, netmask, gw;
   struct netif *default_netif;
   char menu_select = 0;

   char low_mac[3] = {0x00,0x22,0x38};
   char fullmac[6] = {XILINX_MAC_OUI0, XILINX_MAC_OUI1, XILINX_MAC_OUI2,
                      low_mac[0], low_mac[2], low_mac[3]};
   char ip[4] =      {1,2,3,4};
   char subnet[4] =  {255,255,255,0};
   char gateway[4] = {149,199,6,254};

   unsigned int init_wait = 15000000;

   XEmacIf_Config *xemacif_ptr = &XEmacIf_ConfigTable[0];

   /*
    * Enable and initialize cache
    */

   microblaze_init_icache_range(0, XPAR_MICROBLAZE_0_CACHE_BYTE_SIZE);
   microblaze_enable_icache();
   
   microblaze_init_dcache_range(0, XPAR_MICROBLAZE_0_DCACHE_BYTE_SIZE);
   microblaze_enable_dcache();
   
   /*-------------------------------
    * Enable microblaze interrupts
    *-------------------------------*/
   microblaze_enable_interrupts();
   
   /*-------------------------------------------------------------------------
    * Timer and Intc Init
    *
    * Set the Timer to interrupt for every 100ms
    *------------------------------------------------------------------------*/
   
   /* set the number of cycles the timer counts before interrupting */
   /* 100 Mhz clock => .01us for 1 clk tick. For 100ms, 10000000 clk ticks need to elapse  */
   XTmrCtr_mSetLoadReg(XPAR_OPB_TIMER_1_BASEADDR, 0, 100000000);

   /* reset the timers, and clear interrupts */
   XTmrCtr_mSetControlStatusReg(XPAR_OPB_TIMER_1_BASEADDR, 0, XTC_CSR_INT_OCCURED_MASK | XTC_CSR_LOAD_MASK );
   
   /* start the timers */
   XTmrCtr_mSetControlStatusReg(XPAR_OPB_TIMER_1_BASEADDR, 0, XTC_CSR_ENABLE_TMR_MASK | XTC_CSR_ENABLE_INT_MASK | XTC_CSR_AUTO_RELOAD_MASK | XTC_CSR_DOWN_COUNT_MASK);
   

   xil_printf("\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\r\n");
   xil_printf("Starting Up...\r\n");
   
   /*-----------------------------------------------------------------------*/
   /* Do LWIP System Inits                                                  */
   /*-----------------------------------------------------------------------*/
#ifdef STATS
   stats_init();
#endif /* STATS */
   xil_printf("Initializing Memory Structures.");
   sys_init();
   mem_init();
   xil_printf(".");
   memp_init();
   xil_printf(".");
   pbuf_init();
   xil_printf(" done.\r\n");

   /*-----------------------------------------------------------------------*/
   /* Initial Header and Menus.  Do this before the netif_init() so we can  */
   /* change the MAC Address and IP addresses if needed                     */
   /*-----------------------------------------------------------------------*/
   while(init_wait--);
   print_app_header();

   fullmac[0] = XILINX_MAC_OUI0;
   fullmac[1] = XILINX_MAC_OUI1;
   fullmac[2] = XILINX_MAC_OUI2;
   fullmac[3] = low_mac[0];
   fullmac[4] = low_mac[1];
   fullmac[5] = low_mac[2];
   
     
   /*-----------------------------------------------------------------------*/
   /* Set host addresses                                                    */
   /*-----------------------------------------------------------------------*/
   xemacif_setmac(0, (u8_t *) fullmac);                        //Set MAC
   IP4_ADDR(&gw, gateway[0],gateway[1],gateway[2],gateway[3]); //Set gateway
   IP4_ADDR(&ipaddr, ip[0],ip[1],ip[2],ip[3]);                 //Set ip
   IP4_ADDR(&netmask,subnet[0],subnet[1],subnet[2],subnet[3]); //Set subnet msk
   
   /*-----------------------------------------------------------------------*/
   /* Show some host boot stuff and parameters                              */
   /*-----------------------------------------------------------------------*/
   xil_printf("\r\nStarting Network Interface...\r\n");
   xil_printf("  MAC Address: "); show_dashed_hex(6, fullmac);  xil_printf("\r\n");
   xil_printf("  IP Address: ");  show_dotted_decimal(ip);      xil_printf("\r\n");
   xil_printf("  Subnet Mask: "); show_dotted_decimal(subnet);  xil_printf("\r\n");
   xil_printf("  Gateway IP: ");  show_dotted_decimal(gateway); xil_printf("\r\n");
   xil_printf("  TxTest Port: 2000 \r\n");

   /*-----------------------------------------------------------------------*/
   /* Initialize netif                                                      */
   /*-----------------------------------------------------------------------*/
   netif_init();
   
   /*-----------------------------------------------------------------------*/
   /* Initialize TCP Stack                                                  */
   /*-----------------------------------------------------------------------*/
   tcp_init();
   
   /*-----------------------------------------------------------------------*/
   /* Set up the lwIP network interface...                                  */
   /*-----------------------------------------------------------------------*/
   /* allocate netif structure */  
   default_netif = mem_malloc(sizeof(struct netif));

   if (default_netif == NULL) {
      print(NETIF_DEBUG, ("netif_add(): out of memory for default_netif\n"));
      return 1;
   }
   default_netif = netif_add( default_netif,
                              &ipaddr, 
                             &netmask,
                             &gw,
                             &XEmacIf_ConfigTable[0],
                             xemacif_init,
                             ip_input
                             );
   
   netif_set_default(default_netif);


   /* Register XEmacHandler with interrupt controller and enable interrupts */
   XIntc_RegisterHandler(XPAR_OPB_INTC_0_BASEADDR,
                         XPAR_OPB_INTC_0_ETHERNET_MAC_IP2INTC_IRPT_INTR,
#ifdef SGDMA_MODE
                         (XInterruptHandler)XEmac_IntrHandlerDma,
#else
                         (XInterruptHandler)XEmac_IntrHandlerFifo,
#endif
                         xemacif_ptr->instance_ptr);
   
   /* Start the interrupt controller */
   XIntc_mMasterEnable(XPAR_OPB_INTC_0_BASEADDR);
   
   /* Enable timer and EMAC interrupts in the interrupt controller */
   XIntc_mEnableIntr(XPAR_OPB_INTC_0_BASEADDR, XPAR_ETHERNET_MAC_IP2INTC_IRPT_MASK);
   
   /*-----------------------------------------------------------------------*/
   /* create new tcp pcb and start applications                             */
   /*-----------------------------------------------------------------------*/
   
   // Start the Client
   xil_printf("TxTest Client Running ... "); xil_printf("\r\n");
   TxTest_init();

   
   while (1) {
     while (waiting_for_timer) {
       // Call to check if there are any packets
       xemacif_input(default_netif);
       send_data(tx_pcb, ps);
     }
     // Call my_tmr() 
     new_my_tmr(); 
     waiting_for_timer = 1;
   }

      /*
    * Disable cache and reinitialize it so that other
    * applications can be run with no problems
    */

   microblaze_disable_dcache();
   microblaze_init_dcache_range(0, XPAR_MICROBLAZE_0_DCACHE_BYTE_SIZE);
   
   microblaze_disable_icache();
   microblaze_init_icache_range(0, XPAR_MICROBLAZE_0_CACHE_BYTE_SIZE);
   
   return (1);
}

int main ()
{
   return main_main();
}

void mytimer_int_handler (void* baseaddr_p) {

   int baseaddr = *(int *)baseaddr_p;
   unsigned int csr;
   //   unsigned int gpio_data;

  /* Read timer 0 CSR to see if it raised the interrupt */
  csr = XTmrCtr_mGetControlStatusReg(XPAR_OPB_TIMER_1_BASEADDR, 0);
  
  if (csr & XTC_CSR_INT_OCCURED_MASK) {

    //xil_printf("Timer Handler ...\n\t");
     waiting_for_timer = 0;
     
     /* Clear the timer interrupt */
     XTmrCtr_mSetControlStatusReg(XPAR_OPB_TIMER_1_BASEADDR, 0, csr);
  } 
}

void exc_illegal_op(void* arg) {
	print ("Illegal Opcode Exception\r\n");
}

void exc_iopb(void* arg) {
	print ("IOPB Exception \r\n");
}

void exc_dopb(void* arg) {
	print ("DOPB Exception \r\n");
}

void _stack_overflow_exit() {
	print ("Stack Overflow Error \r\n");
}