First, let me introduce myself : I'm a software/hardware engineer interested in TCP/IP, and working on small projects on my own. I'm new on lwip, and i really find this project very interesting. So, i've already started to work on porting your stack on PIC18 family + ENC28J60 ethernet controller (SPI), with MicroC/OS-II. As you may know, this PIC18 family is really really limited in terms of resources, and that's why i'm working to understand all defines, and also trying to use less and less resource for the stack. I'm now starting to get first results, but i'm still on debug phase, sending a few ARP packets on the link.
I would like to share some remarks with you. Sorry in advance if these points were already noticed by anybody else : - first, i have to do back through the ARP code, but i faced some troubles with an 8-bit data which was left-shifted by 8 when building the ARP packet... In case integer promotion is enabled, no problem. But when such an option is cleared, then this becomes a bug. Does this sounds good to you ?
- also, and this is only a suggestion : i would like to get your opinion on the following idea : would it make sense to provide some macros such as eth_if_mem_read() and eth_if_mem_write() when building the packet in lwip functions ? I'm thinking about some higher-level rework of memory, just to provide one more way to allocate/deallocate memory for the stack, but inside the controller memory itself. Maybe (and probably) these allocations in the controller memory are not judicious for all memory allocations (depending on the data access frequency, controller interface speed,...) but it can help people with strong resources constraints (usually RAM) to use controller's memory as a working memory instead of a transmission memory only. Makes sense ?
I hope these points will be interesting for you, and i'm ready to help you if you need support on developping specific thigns on this project,