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[lwip-devel] Using lwIP in Xilinx Gigabit System Reference Design (GSRD)

From: llandre
Subject: [lwip-devel] Using lwIP in Xilinx Gigabit System Reference Design (GSRD)
Date: Fri, 20 Oct 2006 18:35:15 +0200
User-agent: Thunderbird (Windows/20060909)

Hi all,

I tested the GSRD project on gigabit point-to-point link (PC and ML403 board) and I achieved great performances. Since I can accept lower performances, I'm wondering if it is possible to replace the Treck TCP/IP stack with lwIP. What do you think? I think the most challenging issue is to reduce as much as possible the memory requirements in order to keep all code and data in processor cache. IIUC this is the key trick - along with hardware CRC computation - that allows the software stack to handle such a high data throughput.
Any comments or suggestions will be appreciated.


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