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[lwip-commits] Porting LWIP into TI C6203 bug fix


From: Amit Kristal
Subject: [lwip-commits] Porting LWIP into TI C6203 bug fix
Date: Thu, 18 Dec 2003 14:22:03 +0200

Hi all,

I have been porting the lwip onto TI C6203 dsp.
The porting required a change to pbuf_alloc() & I believe I have encountered two bugs in the tcp->tmr & tcp->cwnd:

1. Changes needed in pbuf_alloc():

The DSP requires working 32bit aligned, meaning that memory should be alocated 32bit aligned & that ip_hdr / tcp_hdr will poitn to 32bit aligned addresses. YET the rthernet headr is 14 byte long... the solution was to work with MEM_ALIGNMENT= 4 & in pbuf_alloc() , in case of PBUF_LINK, after mem allocating, make payload point to a 16bit aligned adderss from which the ethrnet packet start, making the ip & tcp headers 32bit aligned in the mem. (PBUF_LINK_HLEN should be defined to 16)

2. tcp->tmr bug fix

I believe I have encountered a bug: tcp->tmr is 16bit yet tcp_ticks is 32bit. (same problem may be with tcp->rttest). This means that after ~9.1 hours the tcp->tmr will wraparound while tcp_ticks keeps on going... (this causes problems when calculating inactive times). the simple solution is to change tcp->tmr to be 32bit. (changing tcp_ticks to 16bit is more work since we have to handle the wraparound thet will happen after only 9 hours , with 32bit it will take enough years...)


3. tcp-> cwnd bug fix on C60:
tcp->cwnd is overflowed in spite of the check:
 if(pcb->cwnd + pcb->mss) > pcb->cwnd) {
   pcb->cwnd += pcb->mss;
 }

Changing to

 if((u16_t)(pcb->cwnd + pcb->mss) > pcb->cwnd) {
   pcb->cwnd += pcb->mss;
 }

solved the problem.


Questions:

1. I get strange values when looking at stats.mem.used, is there a problem using it?

2. Is there anyone out there porting to c60?
3. Does Nagle algorithm currently implemented in the LWIP?
4. Which kind of tests do you recommend me to perform in order to be sure that my porting is successful?

Please comment on my findings above.

Thanks,

                      Amit

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