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Re: What would it take....

From: Samuel Thibault
Subject: Re: What would it take....
Date: Wed, 23 Dec 2009 10:26:09 +0100
User-agent: Mutt/1.5.12-2006-07-14

Da Zheng, le Wed 23 Dec 2009 16:46:34 +0800, a écrit :
> > If you use volatile, the compiler won't
> > optimise instructions so it would "work" too ; note however that it's
> > not SMP safe (it may even not be premption-safe, depending on which
> > instruction the compiler eventually uses).
> We don't need both? If there is only volatile, instructions might be executed 
> out of order and compilers might also reorder instructions.

Volatile prevents from compiler reorder. Out of order execution doesn't
appear at the API level in the UP case, the processor is supposed to
provide a coherent view to the programmer. SMP is a completely different
story of course. Preemption is another story depending on the
architecture and the instructions that get emited (e.g. memory
incrementation ins vs load+inc+store ins).

> As far as I see, spin_lock always uses "volatile" keyword to define spin_lock 
> variables and there is "memory" in the list of clobbered registers of the 
> inline assembly code.

It uses volatile because __spin_lock_locked doesn't do anything
particular and just reads the variable without any memory barrier.

> Doesn't "memory" mean memory barrier?

Depends on what you mean by "memory barrier".  It's a memory barrier only
for the compiler, by telling it that the asm statement modified memory
in a way beyond the other asm constraints.  It doesn't emit an
instruction to ensure memory barrier at the SMP level, for instance.


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