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Ignoring the whitespaces
From: |
Bartłomiej Wójcik |
Subject: |
Ignoring the whitespaces |
Date: |
Wed, 7 Jun 2023 12:23:21 +0200 |
Hi,
The GNU make documentation states:
*define myrule
target:
echo built
endef
$(myrule)
*
*The above makefile results in the definition of a target ‘target’ with
prerequisites ‘echo’ and ‘built’, as if the makefile contained target: echo
built, rather than a rule with a recipe. Newlines still present in a line
after expansion is complete are ignored as normal whitespace.*
Why in that macro the whitespaces between *target:* and *echo built* are
ignored? What is this property and what exactly does it refer to? Where is
it stated in the documentation?
I would appreciate any kind of clarification.
Thanks,
Bartek
- Ignoring the whitespaces,
Bartłomiej Wójcik <=