[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: make Eval function / factoring out analagous rules & variables
From: |
Markus Mauhart |
Subject: |
Re: make Eval function / factoring out analagous rules & variables |
Date: |
Tue, 15 Apr 2003 12:17:42 +0200 |
"Alister Shipman" <address@hidden> wrote ...
>
> - So far I try and define these "dynamically"
> generated macros by:
>
> define PATTERN_MATCH_MACROS
> $(1)_CCOBJS = $${$(1)_CCSRCS:.cc=.o}
> endef
>
> $(foreach library, $(LIBRARY_LIST), $(eval $(call
> PATTERN_MATCH_MACROS,$(library))))
>
> But when it gets to the rules - even when they are
> just typed in (as opposed to generated) i.e
> libsl_dbtypes.a : $(dbtypes_CCOBJS)
>
> it claims there are no pre-requisites for
> libsl_dbtypes.a - and when I try an origin call on
> dbtypes_CCOBJS it reports it as undefined.
IMHO what you did wrong was to use variables inside the
foreach that havnt still got their value:
your foreach ultimately expands to multiple rules, and both
targets & prerequisites of rules are dereferenced
immediately (before your later variable assignments come).
The following for me works as expected:
* make.3.80 made and run under cygwin
* Current dir contains makefile & 11.cpp & 12.cpp.
* makefile:
---------------------
# (1) target specific variables
PROGS += A
A_SRCS = 11.cpp 12.cpp
PROGS += B
B_SRCS = 11.cpp
# (2) templates to construct other variables & rules from target-name:
define PROG_FROM_SRCS
$(1)_OBJS := $($(1)_SRCS:.cpp=.o)
$(1).exe : $$($(1)_OBJS)
@echo building "$$@" from "$$^"
endef
# (3) instantiate NOW the rule-template for all current PROGS:
# This part MUST come AFTER (1&2). Order of (1&2) is irrelevant.
$(foreach prog,$(PROGS),$(eval $(call PROG_FROM_SRCS,$(prog))))
# (4) misc
.SUFFIXES: .cpp .o
%.o : %.cpp
@echo Building "$@" from "$^"
-----------------------
* test it:
$ make A.exe
echo Building "11.o" from "11.cpp"
echo Building "12.o" from "12.cpp"
echo building "A.exe" from "11.o 12.o"
$ make B.exe
echo Building "11.o" from "11.cpp"
echo building "B.exe" from "11.o"
A little simpler version of the makefile (diff = (**)):
* makefile:
---------------------
# (1) target specific variables
PROGS += A
A_SRCS = 11.cpp 12.cpp
PROGS += B
B_SRCS = 11.cpp
# (2) templates to construct other variables & rules from target-name:
define PROG_FROM_SRCS_2
$(prog)_OBJS := $($(prog)_SRCS:.cpp=.o)
$(prog).exe : $$($(prog)_OBJS)
@echo building "$$@" from "$$^"
endef
# (3) instantiate NOW the rule-template for all current PROGS:
# This part MUST come AFTER (1&2). Order of (1&2) is irrelevant.
$(foreach prog,$(PROGS),$(eval $(PROG_FROM_SRCS_2))) #(**)
# (4) misc
.SUFFIXES: .cpp .o
%.o : %.cpp
@echo Building "$@" from "$^"
-----------------------
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- Re: make Eval function / factoring out analagous rules & variables,
Markus Mauhart <=