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[Help-gnucap] Development version won't recognize my netlist
From: |
Thaddeus Meizelis |
Subject: |
[Help-gnucap] Development version won't recognize my netlist |
Date: |
Fri, 28 Mar 2008 11:12:35 -0500 |
I am having trouble running my netlist in interactive mode. Based on reading
the mailing lists, I am guessing that it has something to do with the
language option, but I have not yet been able to figure out how to set it to
run spice.
I compiled the 2008-02-11 development version of gnucap. When I run my
circuit, it seems like every statement is wrong:
**Sign-on message
* gnucap
^ ? what's this?
.ATTACH ./taddiode.so
^ ? what's this?
.model 1N750mod B(Is=880.5E-18 Rs=0 N=1 Xti=3 Eg=1.11 Cjo=
^ ? model: no match
* Circuit
^ ? what's this?
D1 (1 0) 1N750
^ ? what's this?
R1 (2 1) 1k
^ ? what's this?
V1 (2 0) generator(1)
^ ? what's this?
B2 (3 0) 1N750mod
^ ? what's this?
R2 (2 3) 1k
^ ? what's this?
.PRINT DC V(D1) V(R1) I(D1) geq(D1) V(B2) V(R2) I(B2) geq(B2
^ ? what's this?
.DC -10 10 1
^ ? what's this?
.DC
^ ? what's this?
.OP
^ ? what's this?
I ran the 2007-12-16 version of gnucap. Since previously I was trying to
make my own model with a reference designation of B, and I had not
implemented my model with this version of Gnucap, this is what I would
expect to see.
** Sign-on message
* gnucap
d: already installed, replacing
stashing as d:0
D: already installed, replacing
stashing as D:0
diode: already installed, replacing
stashing as diode:0
.model 1N750mod B(Is=880.5E-18 Rs=0 N=1 Xti=3 Eg=1.11 Cjo=
^ ? model: no match
B2 3 0 1N750mod
^ ? bad command
.PRINT DC V(D1) V(R1) I(D1) geq(D1) V(B2) V(R2) I(B2) geq(B2
^ ? no match
... ) V(R1) I(D1) geq(D1) V(B2) V(R2) I(B2) geq(B2)
^ ? no match
... I(D1) geq(D1) V(B2) V(R2) I(B2) geq(B2)
^ ? no match
Here is my netlist:
* gnucap
.ATTACH ./taddiode.so
.model 1N750 D(Is=880.5E-18 Rs=0 N=1 Xti=3 Eg=1.11 Cjo=175p M=.5516
+ Vj=.75 Fc=.5 Bv=7.5 Ibv=20.245m) ' Nbv=1.6989)
.model 1N750mod B(Is=880.5E-18 Rs=0 N=1 Xti=3 Eg=1.11 Cjo=175p M=.5516
+ Vj=.75 Fc=.5 Bv=7.5 Ibv=20.245m) ' Nbv=1.6989)
* Circuit
D1 1 0 1N750
R1 2 1 1k
V1 2 0 generator(1)
B2 3 0 1N750mod
R2 2 3 1k
.PRINT DC V(D1) V(R1) I(D1) geq(D1) V(B2) V(R2) I(B2) geq(B2)
.DC -10 10 1
.DC
Tad
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