Re: make question (setting variables)

[Paul D. Smith]

%% "James" <hslee@ind.alcatel.com> writes:

  j> I have a situation where tens of target dependent variables need to be
  j> set.

  j> T: AA=aa
  j> T: BB=bb
  j> T: CC=cc
  j> etc.

  j> Is there a compact way of writing these instead of writing
  j> line-by-line?

No.  But you can use eval to do it in a loop:

  $(foreach V,AA=aa BB=bb CC=cc,$(eval T: $(V)))

Note this will ONLY work with simple variable values (ones that contain
no whitespace).  Trying to allow values with whitespace using this
method would be more work than just writing them all out.


Alternatively, if your problem is not really so much that you have lots
of target-dependent variable values you need to set, but rather that you
have lots of targets that need these variables set, you can loop on the
target, something like this:

  define SET-VARS
    $(1): AA=aa
    $(1): BB=bb
    $(1): CC=cc
  endef

  $(foreach T,$(TARGETS),$(eval $(call SET-VARS,$(T))))

You have to write out all the variable settings, yes, but only once
rather than once per target.

(note this requires at least GNU make 3.80)

-- 
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