Is there a way to work around the following oddity with % in GNU Make?

[Andrew Koenig]

Suppose I have a directory with a bunch of .o files and a bunch of .exe
files.  Each .exe file depends on the corresponding .o file, and some
of the .exe files additionally depend on lib.o.

If all the .exe files depended on lib.o, I could write something like
this:

    %.exe: %.o lib.o
        $(CC) -o $@ $^

However, only some of the .exe files depend in this way.

I would like to be able to write this:

    %.exe: %.o
        $(CC) -o $@ $^

    foo.exe bar.exe: lib.o

but it doesn't work: As soon as make discovers that a % rule matches,
it ignores any additional rules, so lib.o doesn't get included in the
$^ list.

Is there any way of doing what I want?