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Problem regenerating file removed by rule

From: Darren Hiebert
Subject: Problem regenerating file removed by rule
Date: 6 Apr 2005 10:05:02 -0700
User-agent: G2/0.2

The following makefile fails when compiled with -j (make-3.81beta1). It
is a simplified example of a more complicated makefile. What I am
trying to do is create a set of rules that complete the compilation of
a files created by a third-party compiler over whose actions I have no
control. The essential actions of this third-party compiler are
reproduced in the macro contained in the makefile.

To demonstrate the problem, issue the following commands using the
makefile below:

$ make -j
$ touch source
$ make -j

The problem is that the the created by the first invocation
of make is removed by the third-party compiler during the second
invocation of make, and make does not rebuild it from the existing
rules, even though I have a dependency to create it again after the
third-party compiler runs (indirectly via the dependency upon
sub/Makefile.SH; doesn't have to be regenerated if
Makefile.SH is newer--it only has to be sure that the file exists,
implying that the sub directory exists, which is guaranteed when
Makeifile.SH is brought up to date; thus the order-only dependency).

As much as I examime the rules I have written around this compiler, I
cannot see why is not regenerated by the makefile after it is
deleted by the compiler. It seems that when compiled using -j, make
believes that it already checked the existence of before
running the rule to run the third-party compiler and isn't prepared for
its deletion (despite the dependency, which should check the file AFTER
is order-only dependent is brought up to date).

Can someone please tell me what is wrong?
Your assistance is greatly appreciated.


-------------- Begin Makefile -------------
# I have no control over this action, performed by a third party
define third_party_compiler
        rm -fr sub
        mkdir -p sub
        touch sub/Makefile.SH
        echo 'if [ ! -f ]; then echo " missing"; exit 1;
fi' >> sub/Makefile.SH
        echo '. ./' >> sub/Makefile.SH
        echo 'echo "default: ; touch final" >>Makefile' >> sub/Makefile.SH
        touch $@

sub/final: sub/Makefile
        $(MAKE) -C $(<D)

sub/Makefile: sub/Makefile.SH sub/
        cd $(<D) && sh Makefile.SH

sub/ | sub/Makefile.SH
        touch $@

sub/Makefile.SH: epr ;

epr: source

        touch $@

        rm -f epr source
        rm -fr sub
-------------- End Makefile -------------

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