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Multiple targets of pattern rules with GNU Make

From: Kevin B. McCarty
Subject: Multiple targets of pattern rules with GNU Make
Date: Mon, 24 May 2004 18:27:19 GMT
User-agent: Pan/ (As She Crawled Across the Table (Debian GNU/Linux))

Hi all,

I am trying to do something like the following in a Makefile, but I want
to make it much less redundant (since I have practically identical rules
for C and FORTRAN files as well as C++).

%.3.o: $(HEADERS)
        $(CXX) -c $(CXXFLAGS) $< -DDEBUG3 -o ../build/$@

%.2.o: $(HEADERS)
        $(CXX) -c $(CXXFLAGS) $< -DDEBUG2 -o ../build/$@

[likewise for %.1.o and %.0.o]

I need something compatible with Make 3.79.1 (as I'm using Debian 3.0 on
production servers), so unfortunately $(eval ...) is not an option.  The
first thing that came to mind was to rewrite the rules in this format:

$(foreach num,0 1 2 3,%.$(num).o): $(HEADERS)
        $(CXX) -c $(CXXFLAGS) $< -DDEBUG$(subst .,,$(suffix $(basename $@))) \
                -o ../build/$@

This of course does not work, since GNU Make assumes that the command will
generate _all_ of the targets when multiple targets are present in a
pattern rule.

Is there any way to force Make to behave as if the above rule contained
statically defined targets, so it would be equivalent to the set of rules
listed at top?  Or some other reasonably non-obfuscated way to do what I
want without so much redundancy, but compatible with Make 3.79.1?

Thanks in advance,

Kevin B. McCarty <kmccarty at princeton dot edu>

"There is no great genius without   WWW:
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