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[Guile-commits] 69/437: implement long mul/div/mod for x86-64
From: |
Andy Wingo |
Subject: |
[Guile-commits] 69/437: implement long mul/div/mod for x86-64 |
Date: |
Mon, 2 Jul 2018 05:13:48 -0400 (EDT) |
wingo pushed a commit to branch lightning
in repository guile.
commit ee99e520f5381d4d51cb14bf721c81b2086f20a0
Author: Paolo Bonzini <address@hidden>
Date: Wed Mar 19 09:23:47 2008 +0100
implement long mul/div/mod for x86-64
2008-03-19 Paolo Bonzini <address@hidden>
* lightning/i386/core-64.h: Implement long mul/div/mod.
---
ChangeLog | 4 ++
lightning/i386/core-64.h | 103 +++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 107 insertions(+)
diff --git a/ChangeLog b/ChangeLog
index 7a74dd0..0e81650 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,9 @@
2008-03-19 Paolo Bonzini <address@hidden>
+ * lightning/i386/core-64.h: Implement long mul/div/mod.
+
+2008-03-19 Paolo Bonzini <address@hidden>
+
* lightning/i386/asm-i386.h: Cast memory address to long for JCCim.
2008-03-15 Paolo Bonzini <address@hidden>
diff --git a/lightning/i386/core-64.h b/lightning/i386/core-64.h
index 314913d..efd3ee8 100644
--- a/lightning/i386/core-64.h
+++ b/lightning/i386/core-64.h
@@ -268,5 +268,108 @@ static int jit_arg_reg_order[] = { _EDI, _ESI, _EDX, _ECX
};
#define jit_bgtr_ul(label, s1, s2) jit_bra_qr((s1), (s2), JAm(label) )
#define jit_bger_ul(label, s1, s2) jit_bra_qr((s1), (s2), JAEm(label) )
+#define jit_muli_l_(is, rs) \
+ (MOVQir(is, rs == _RAX ? _RDX : _RAX), \
+ IMULQr(rs == _RAX ? _RDX : rs))
+
+#define jit_muli_ul_(is, rs) \
+ (MOVQir(is, rs == _RAX ? _RDX : _RAX), \
+ IMULQr(rs == _RAX ? _RDX : rs))
+
+#define jit_divi_l_(result, d, rs, is) \
+ (jit_might (d, _RAX, jit_pushr_l(_RAX)), \
+ jit_might (d, _RCX, jit_pushr_l(_RCX)), \
+ jit_might (d, _RDX, jit_pushr_l(_RDX)), \
+ jit_might (rs, _RAX, MOVQrr(rs, _RAX)), \
+ jit_might (rs, _RDX, MOVQrr(rs, _RDX)), \
+ MOVQir(is, _RCX), \
+ SARQir(63, _RDX), \
+ IDIVQr(_RCX), \
+ jit_might(d, result, MOVQrr(result, d)), \
+ jit_might(d, _RDX, jit_popr_l(_RDX)), \
+ jit_might(d, _RCX, jit_popr_l(_RCX)), \
+ jit_might(d, _RAX, jit_popr_l(_RAX)))
+
+#define jit_divr_l_(result, d, s1, s2) \
+ (jit_might (d, _RAX, jit_pushr_l(_RAX)), \
+ jit_might (d, _RCX, jit_pushr_l(_RCX)), \
+ jit_might (d, _RDX, jit_pushr_l(_RDX)), \
+ ((s1 == _RCX) ? jit_pushr_l(_RCX) : 0), \
+ jit_might (s2, _RCX, MOVQrr(s2, _RCX)), \
+ ((s1 == _RCX) ? jit_popr_l(_RDX) : \
+ jit_might (s1, _RDX, MOVQrr(s1, _RDX))), \
+ MOVQrr(_RDX, _RAX), \
+ SARQir(63, _RDX), \
+ IDIVQr(_RCX), \
+ jit_might(d, result, MOVQrr(result, d)), \
+ jit_might(d, _RDX, jit_popr_l(_RDX)), \
+ jit_might(d, _RCX, jit_popr_l(_RCX)), \
+ jit_might(d, _RAX, jit_popr_l(_RAX)))
+
+#define jit_divi_ul_(result, d, rs, is) \
+ (jit_might (d, _RAX, jit_pushr_l(_RAX)), \
+ jit_might (d, _RCX, jit_pushr_l(_RCX)), \
+ jit_might (d, _RDX, jit_pushr_l(_RDX)), \
+ jit_might (rs, _RAX, MOVQrr(rs, _RAX)), \
+ MOVQir(is, _RCX), \
+ XORQrr(_RDX, _RDX), \
+ DIVQr(_RCX), \
+ jit_might(d, result, MOVQrr(result, d)), \
+ jit_might(d, _RDX, jit_popr_l(_RDX)), \
+ jit_might(d, _RCX, jit_popr_l(_RCX)), \
+ jit_might(d, _RAX, jit_popr_l(_RAX)))
+
+#define jit_divr_ul_(result, d, s1, s2) \
+ (jit_might (d, _RAX, jit_pushr_l(_RAX)), \
+ jit_might (d, _RCX, jit_pushr_l(_RCX)), \
+ jit_might (d, _RDX, jit_pushr_l(_RDX)), \
+ ((s1 == _RCX) ? jit_pushr_l(_RCX) : 0), \
+ jit_might (s2, _RCX, MOVQrr(s2, _RCX)), \
+ ((s1 == _RCX) ? jit_popr_l(_RAX) : \
+ jit_might (s1, _RAX, MOVQrr(s1, _RAX))), \
+ XORQrr(_RDX, _RDX), \
+ DIVQr(_RCX), \
+ jit_might(d, result, MOVQrr(result, d)), \
+ jit_might(d, _RDX, jit_popr_l(_RDX)), \
+ jit_might(d, _RCX, jit_popr_l(_RCX)), \
+ jit_might(d, _RAX, jit_popr_l(_RAX)))
+
+#define jit_muli_l(d, rs, is) jit_op_ ((d), (rs), IMULQir((is), (d))
)
+#define jit_mulr_l(d, s1, s2) jit_opr_((d), (s1), (s2), IMULQrr((s1), (d)),
IMULQrr((s2), (d)) )
+
+/* As far as low bits are concerned, signed and unsigned multiplies are
+ exactly the same. */
+#define jit_muli_ul(d, rs, is) jit_op_ ((d), (rs), IMULQir((is), (d))
)
+#define jit_mulr_ul(d, s1, s2) jit_opr_((d), (s1), (s2), IMULQrr((s1), (d)),
IMULQrr((s2), (d)) )
+
+#define jit_hmuli_l(d, rs, is)
\
+ ((d) == _RDX ? ( jit_pushr_l(_RAX), jit_muli_l_((is),
(rs)), jit_popr_l(_RAX) ) : \
+ ((d) == _RAX ? (jit_pushr_l(_RDX), jit_muli_l_((is),
(rs)), MOVQrr(_RDX, _RAX), jit_popr_l(_RDX) ) : \
+ (jit_pushr_l(_RDX), jit_pushr_l(_RAX), jit_muli_l_((is),
(rs)), MOVQrr(_RDX, (d)), jit_popr_l(_RAX), jit_popr_l(_RDX) )))
+
+#define jit_hmulr_l(d, s1, s2)
\
+ ((d) == _RDX ? ( jit_pushr_l(_RAX), jit_mulr_l_((s1),
(s2)), jit_popr_l(_RAX) ) : \
+ ((d) == _RAX ? (jit_pushr_l(_RDX), jit_mulr_l_((s1),
(s2)), MOVQrr(_RDX, _RAX), jit_popr_l(_RDX) ) : \
+ (jit_pushr_l(_RDX), jit_pushr_l(_RAX), jit_mulr_l_((s1),
(s2)), MOVQrr(_RDX, (d)), jit_popr_l(_RAX), jit_popr_l(_RDX) )))
+
+#define jit_hmuli_ul(d, rs, is)
\
+ ((d) == _RDX ? ( jit_pushr_l(_RAX), jit_muli_ul_((is),
(rs)), jit_popr_l(_RAX) ) : \
+ ((d) == _RAX ? (jit_pushr_l(_RDX), jit_muli_ul_((is),
(rs)), MOVQrr(_RDX, _RAX), jit_popr_l(_RDX) ) : \
+ (jit_pushr_l(_RDX), jit_pushr_l(_RAX),
jit_muli_ul_((is), (rs)), MOVQrr(_RDX, (d)), jit_popr_l(_RAX), jit_popr_l(_RDX)
)))
+
+#define jit_hmulr_ul(d, s1, s2)
\
+ ((d) == _RDX ? ( jit_pushr_l(_RAX), jit_mulr_ul_((s1),
(s2)), jit_popr_l(_RAX) ) : \
+ ((d) == _RAX ? (jit_pushr_l(_RDX), jit_mulr_ul_((s1),
(s2)), MOVQrr(_RDX, _RAX), jit_popr_l(_RDX) ) : \
+ (jit_pushr_l(_RDX), jit_pushr_l(_RAX),
jit_mulr_ul_((s1), (s2)), MOVQrr(_RDX, (d)), jit_popr_l(_RAX),
jit_popr_l(_RDX) )))
+
+#define jit_divi_l(d, rs, is) jit_divi_l_(_RAX, (d), (rs), (is))
+#define jit_divi_ul(d, rs, is) jit_divi_ul_(_RAX, (d), (rs), (is))
+#define jit_modi_l(d, rs, is) jit_divi_l_(_RDX, (d), (rs), (is))
+#define jit_modi_ul(d, rs, is) jit_divi_ul_(_RDX, (d), (rs), (is))
+#define jit_divr_l(d, s1, s2) jit_divr_l_(_RAX, (d), (s1), (s2))
+#define jit_divr_ul(d, s1, s2) jit_divr_ul_(_RAX, (d), (s1), (s2))
+#define jit_modr_l(d, s1, s2) jit_divr_l_(_RDX, (d), (s1), (s2))
+#define jit_modr_ul(d, s1, s2) jit_divr_ul_(_RDX, (d), (s1), (s2))
+
#endif /* __lightning_core_h */
- [Guile-commits] 367/437: X86: No longer make st7 available as a temporary, (continued)
- [Guile-commits] 367/437: X86: No longer make st7 available as a temporary, Andy Wingo, 2018/07/02
- [Guile-commits] 406/437: Adapt for binutils 2.29, Andy Wingo, 2018/07/02
- [Guile-commits] 395/437: Use an actual, invalid code, as last jit code., Andy Wingo, 2018/07/02
- [Guile-commits] 344/437: ARM: Better check for constants offset overflow, Andy Wingo, 2018/07/02
- [Guile-commits] 351/437: PPC: Only call binutils function if it is available, Andy Wingo, 2018/07/02
- [Guile-commits] 278/437: x86_64: Change x86_64 to also save/restore %rbx in inline asm., Andy Wingo, 2018/07/02
- [Guile-commits] 427/437: Remove some more of the lightning build machinery, Andy Wingo, 2018/07/02
- [Guile-commits] 328/437: Update THANKS file, Andy Wingo, 2018/07/02
- [Guile-commits] 129/437: Remove previous macro files as they are no longer used., Andy Wingo, 2018/07/02
- [Guile-commits] 09/437: add autotools-generated files, Andy Wingo, 2018/07/02
- [Guile-commits] 69/437: implement long mul/div/mod for x86-64,
Andy Wingo <=
- [Guile-commits] 162/437: Correct regressions with --with-float={soft, softfp} in the arm backend, Andy Wingo, 2018/07/02
- [Guile-commits] 377/437: aarch64: Add initial jit_va_ calls to aarch64, Andy Wingo, 2018/07/02
- [Guile-commits] 298/437: ARM: Correct wrong table of instruction sizes in software float, Andy Wingo, 2018/07/02
- [Guile-commits] 99/437: always set and replace lightning_frag, Andy Wingo, 2018/07/02
- [Guile-commits] 336/437: Correct bogus git entry, Andy Wingo, 2018/07/02
- [Guile-commits] 282/437: Document the lightning customization functions., Andy Wingo, 2018/07/02
- [Guile-commits] 290/437: Do not pass null for free, memcpy and memmove, Andy Wingo, 2018/07/02
- [Guile-commits] 249/437: Make jit_get_note a public interface., Andy Wingo, 2018/07/02
- [Guile-commits] 299/437: ALPHA: Correct class of argument float registers, Andy Wingo, 2018/07/02
- [Guile-commits] 426/437: Remove empty lightning m4 directory, Andy Wingo, 2018/07/02