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Re: arm64 softfloat


From: Leif Lindholm
Subject: Re: arm64 softfloat
Date: Wed, 3 Jun 2015 12:06:50 +0100
User-agent: Mutt/1.5.21 (2010-09-15)

On Tue, Jun 02, 2015 at 07:51:12PM +0300, Andrei Borzenkov wrote:
> > What is the relation of -mgeneral-regs-only with +nofp? The decription
> > of -mgeneral-regs-only in manual is very vague
> 
> According to
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0774a/chr1392305446662.html

That is ARM's commercial clang-based compiler suite though, not
upstream clang.
 
> 1.16 -mgeneral-regs-only
> 
> Prevents the use of floating-point instructions or floating-point registers.
> Note
> The -mgeneral-regs-only option is only valid with the aarch64-arm-none-eabi 
> target. Use -mfpu=none to prevent the use of floating-point instructions or 
> floating-point registers for the armv8a-arm-none-eabi target.
> 
> The description is for armclang; we can just hope that GCC is using the
> same semantic.

https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html
---
Generate code which uses only the general registers. 
---

http://clang.llvm.org/docs/UsersManual.html
---
Generate code which only uses the general purpose registers.

This option restricts the generated code to use general registers
only. This only applies to the AArch64 architecture.
---

/
    Leif



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