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Re: [gpsd-dev] SHM refclock improvements
From: |
Eric S. Raymond |
Subject: |
Re: [gpsd-dev] SHM refclock improvements |
Date: |
Tue, 28 Aug 2012 19:34:26 -0400 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
Hal Murray <address@hidden>:
> The key is that the writer updates X then Y while the reader reads them in
> the opposite order.
>
> Note that the reader never writes to shared memory and the writer never reads
> anything. That allows multiple readers.
>
> X and Y need to be sized so they are atomically updatable. The code also
> needs cache flushes in the right places. I think a cache flush is a no-op on
> x86. I think it needs real code on ARM and others. There should be a FAQ on
> this, but I didn't find it with a quick search.
Heh. We actually use this very technique in *our* SHM interface.
--
<a href="http://www.catb.org/~esr/">Eric S. Raymond</a>
- Re: [gpsd-dev] SHM refclock improvements, (continued)
- Re: [gpsd-dev] SHM refclock improvements, Gary E. Miller, 2012/08/28
- Re: [gpsd-dev] SHM refclock improvements, Harlan Stenn, 2012/08/28
- Re: [gpsd-dev] SHM refclock improvements, Hal Murray, 2012/08/28
- Re: [gpsd-dev] SHM refclock improvements, Gary E. Miller, 2012/08/28
- Re: [gpsd-dev] SHM refclock improvements, Harlan Stenn, 2012/08/28
- Re: [gpsd-dev] SHM refclock improvements, Gary E. Miller, 2012/08/28
- Re: [gpsd-dev] SHM refclock improvements, Dave Platt, 2012/08/28
- Re: [gpsd-dev] SHM refclock improvements, Harlan Stenn, 2012/08/28
- Re: [gpsd-dev] SHM refclock improvements, Eric S. Raymond, 2012/08/28
- Re: [gpsd-dev] SHM refclock improvements, Hal Murray, 2012/08/28
- Re: [gpsd-dev] SHM refclock improvements,
Eric S. Raymond <=
Re: [gpsd-dev] SHM refclock improvements, Miroslav Lichvar, 2012/08/29