[ft] Re: Fw: Compile Error use arm-linux-gcc3.4.1

[mpsuzuki]

Dear Johnson,

I guess this failure has following scenario and not
related with ARM instruction set. I found that quite
similar error was found by Qt developers:
  http://bugreports.qt.nokia.com/browse/QTBUG-6521

1) You build with default ftconfig.h in "include/freetype/config/ftconfig.h",
   instead of auto-configured ftconfig.h in "builds/unix/ftconfig.h".
   It is not so popular for the cross developers using
   configure (so the error reproduction could be tricky),
   but it might be popular for the projects that include
   FreeType2 source code and build with external configurators,
   aslike Qt.

2) FT_MulFix_arm() in include/freetype/config/ftconfig.h has
   a problematic syntax, an argument to "orr" instruction is
   omitted. On the other hand, builds/unix/ftconfig.h does
   not have.

   include/freetype/config/ftconfig.h
   ----------------------------------

    asm __volatile__ (
      "smull  %1, %2, %4, %3\n\t"   /* (lo=%1,hi=%2) = a*b */
      "mov    %0, %2, asr #31\n\t"  /* %0  = (hi >> 31) */
      "add    %0, %0, #0x8000\n\t"  /* %0 += 0x8000 */
      "adds   %1, %1, %0\n\t"       /* %1 += %0 */
      "adc    %2, %2, #0\n\t"       /* %2 += carry */
      "mov    %0, %1, lsr #16\n\t"  /* %0  = %1 >> 16 */
      "orr    %0, %2, lsl #16\n\t"  /* %0 |= %2 << 16 */

   builds/unix/ftconfig.in
   -----------------------
    __asm__ __volatile__ (
      "smull  %1, %2, %4, %3\n\t"       /* (lo=%1,hi=%2) = a*b */
      "mov    %0, %2, asr #31\n\t"      /* %0  = (hi >> 31) */
      "add    %0, %0, #0x8000\n\t"      /* %0 += 0x8000 */
      "adds   %1, %1, %0\n\t"           /* %1 += %0 */
      "adc    %2, %2, #0\n\t"           /* %2 += carry */
      "mov    %0, %1, lsr #16\n\t"      /* %0  = %1 >> 16 */
      "orr    %0, %0, %2, lsl #16\n\t"  /* %0 |= %2 << 16 */

   You can find the number of arguments to "orr" is different.

3) The earlier version of GNU binutils does not accept this
   "omitted" syntax, although latest version (binutils-2.21,
   I've tested) accepts it. As far as using GNU binutils (to
   reproduce this error, I used GNU binutils-2.12), even if
   I add "-march=armv5" to GCC, the problem occurs. So I
   think this is not related with the incorrect instruction
   set.

4) Therefore, I guess, fixing the omitted syntax in
   include/freetype/config/ftconfig.h
   may help you...? Also, "__asm__" would be better "asm".

I've fixed in GIT. Please check if the fix of the argument
number can help you.

diff --git a/ChangeLog b/ChangeLog
index c3dff28..fcc47ee 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,19 @@
 2011-01-15  suzuki toshiya  <address@hidden>
 
+       Fix ARM assembly code in include/freetype/config/ftconfig.h.
+
+       * include/freetype/config/ftconfig.h (FT_MulFix_arm):
+       Copy the maintained code from builds/unix/ftconfig.in.
+       Old GNU binutils could not accept the reduced syntax
+       `orr %0, %2, lsl #16'.  Un-omitted syntax like RVCT,
+       `orr %0, %0, %2, lsl #16' is better.  Reported by
+       Johnson Y. Yan.  The bug report by Qt developers is
+       considered too.
+
+       http://bugreports.qt.nokia.com/browse/QTBUG-6521
+
+2011-01-15  suzuki toshiya  <address@hidden>
+
        Copy -mcpu=* & -march=* options from CFLAGS to LDFLAGS.
 
        * builds/unix/configure.raw: Consider recent gcc-standard
diff --git a/builds/unix/install-sh b/builds/unix/install-sh
old mode 100644
new mode 100755
diff --git a/include/freetype/config/ftconfig.h 
b/include/freetype/config/ftconfig.h
index cbe30f2..bcbcd6f 100644
--- a/include/freetype/config/ftconfig.h
+++ b/include/freetype/config/ftconfig.h
@@ -348,14 +348,14 @@ FT_BEGIN_HEADER
     register FT_Int32  t, t2;
 
 
-    asm __volatile__ (
-      "smull  %1, %2, %4, %3\n\t"   /* (lo=%1,hi=%2) = a*b */
-      "mov    %0, %2, asr #31\n\t"  /* %0  = (hi >> 31) */
-      "add    %0, %0, #0x8000\n\t"  /* %0 += 0x8000 */
-      "adds   %1, %1, %0\n\t"       /* %1 += %0 */
-      "adc    %2, %2, #0\n\t"       /* %2 += carry */
-      "mov    %0, %1, lsr #16\n\t"  /* %0  = %1 >> 16 */
-      "orr    %0, %2, lsl #16\n\t"  /* %0 |= %2 << 16 */
+    __asm__ __volatile__ (
+      "smull  %1, %2, %4, %3\n\t"       /* (lo=%1,hi=%2) = a*b */
+      "mov    %0, %2, asr #31\n\t"      /* %0  = (hi >> 31) */
+      "add    %0, %0, #0x8000\n\t"      /* %0 += 0x8000 */
+      "adds   %1, %1, %0\n\t"           /* %1 += %0 */
+      "adc    %2, %2, #0\n\t"           /* %2 += carry */
+      "mov    %0, %1, lsr #16\n\t"      /* %0  = %1 >> 16 */
+      "orr    %0, %0, %2, lsl #16\n\t"  /* %0 |= %2 << 16 */
       : "=r"(a), "=&r"(t2), "=&r"(t)
       : "r"(a), "r"(b) );
     return a;

Regards,
mpsuzuki


On Sat, 15 Jan 2011 19:54:11 +0900
suzuki toshiya <address@hidden> wrote:

>Dear Johnson,
>
>I will take a look, but I don't have ARMv4 machine to check
>the assembly code. Could you help me to check the revised
>version will work or not? The easiest/simplest fix would be
>disabling the assembly code for smaller versions of ARM
>architecture, but it won't be what you want...
>
>Regards,
>mpsuzuki
>
>Werner LEMBERG wrote:
>> ARM developers, please comment and help if possible!