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Conceptually: Loops


From: Lukas Haase
Subject: Conceptually: Loops
Date: Wed, 20 May 2020 16:41:15 +0200

Hello,

I have an application where I communicate with a device in a tightly 
time-controlled (and synchronized) manner: In gnuradio I send some data, wait 
for some data (at precise moment in time) and process the results.

For this I created an OOT module which outputs databits and receives databits 
(input & output). It is a FSM.

Then I have a hierarchical block which implements the IF part (Bits in, IF-Out, 
IF-In, Bits out). It includes all signal processing at IF (resampling, 
filtering, frequency conversion, ...).

Finally I created a block for the analog frontend (IF-In, IF-Out). It includes 
one USRP Sink and USRP Source. The reason why I have one block is again that 
USRP Source/Sink must be synchronized and the block abstracts a couple of 
things of these away. Additionally I created the same block (same I/O, same 
parameters) for simulation which allows me to quickly switch between simulation 
and actual hardware. It also provides the flexibility to switch to different 
hardware or to use a block like gr-radars echotimer.

Hence:

 +-------+       +------+     +----------+
 |  My   |------>|      |---->|          |
 |  FSM  |       |  IF  |     |    RF    |
 | block |       |      |     | frontend |
 |       |<------|      |<----|          |
 +-------+       +------+     +----------+

Clearly this results in a loop but this loop isn't an inherent issue (such as 
an uncomputable algebraic loop). I can break it by inserting a ZMQ Source/Sink 
in between but this is of course not optimal.
I can also split up "IF" and "RF frontend" in two parts but then I loose the 
nice abstraction layer that I created. Or split up "My FSM block". But then I 
loose the ability to tighly control the transmitted and received bits.

What is the most elegant way to resolve this?

Thanks,
Lukas




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