Re: Is there anything about USRP blocks that breaks them within hier blocks?

[Lukas Haase]

Hi Marcus,

Marcus D. Leech:>> On 12/03/2019 09:40 PM, Lukas Haase wrote: Hi,
>>
>> Am I not supposed to put USRP blocks within a hierarchichal block
>> and if so, why?
>>
>> Very strange minimal example (Ettus USRP X310, Windows 10,
>> gnuradio 3.7.13.5):
>>
>> https://paste.pics/8a1cf2b2661fab2bc71b760e369997b9
>>
>> Works and with a spectrum analyzer I see the tone at 916 MHz.
>>
>> Then I do nothing more than putting the Signal Source and USRP
>> Sink into a hier block and using it:
>>
>> https://paste.pics/8c7c200035a083e218625360defc8015
>>
>> https://paste.pics/bcd7969f3299f54e56b0d3ca210d97af
>>
>> It's hard to believe but true: The spectrum analyzer stays silent!
>>  It doesn't output anything.
>>
>> All messages on the console are same as well: The FPGA image gets
>> loaded onto the USRP and it starts. For a brief moment at startup,
>> the spectrum analyzer shows a small tone at 916MHz which
>> disappears again.
>
> Your gain is 0, that might have some bearing.   Also, you should see
> the main tone at 915M, because your baseband signal is at -1M.



No, unofrtunately.

0 gain is still something like -10dBm. Huge and clearly visible on a spectrum 
analyzer.
Where the exact tone is doesn't matter because my span is 10Mhz (I actually 
meant 915MHz) and I used full span to look at the entire frequency range.

The point is: I filled all numbers in numerically and everything works if the 
URSP Source is in my main block. Then I *copy and paste* everything (to avoid 
any doubts) into a hier-block, put in the hier block and it stops working. I 
showed the exact screenshots.
Even the leakage from the USRP itself is gone which means that the USRP just 
turns off, crashed badly or similar.

This is either a weird bug or we are not supposed to use the USRP block within 
a hier block.

Thanks,
Luke