Re: [Discuss-gnuradio] RSSI calculation

[Marcus D. Leech]

On 03/25/2011 10:52 PM, Fengyuan Gong wrote:

Hi, All,

I am a bit confused about RSSI calculation.

In the given verilog code at http://code.ettus.com/redmine/ettus/projects/fpga/repository/revisions/8b377a9d6d0ad281474a8dbff49ea3b093178b28/entry/usrp2/sdr_lib/rssi.v 

I can see RSSI is defined by 16 bits.

But in usrp_prims_common.cc, function usrp_read_aux_adc,

*value = ((v_hi << 2) | ((v_lo >> 6) & 0x3)) << 2; // format as 12-bit

the value is only assigned by 12 bits. I though the value is RSSI. But then it contradicts with format given in the verilog code. Or value is not RSSI?

Any help is appreciated.

Fengyuan

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I believe that the aux adcs are only 12-bit resolution.

Furthermore, only one or two daughtercards actually provide an analog RSSI signal that the aux_adc can read.

A better RSSI estimate can be produced in software:

     source--->complex-to-mag-squared----->single-pole-iir-filter

-- 
Marcus Leech
Principal Investigator
Shirleys Bay Radio Astronomy Consortium
http://www.sbrac.org