Re: [Discuss-gnuradio] re: Low cost hardware option

[Brian Padalino]

On Wed, Jan 12, 2011 at 8:36 PM, Jamie Morken <address@hidden> wrote:
>
> Hi,
>
> I am interested in helping out with making some new gnuradio hardware that is 
> compatible with the USRP daughterboards.  I worked with Matt doing CAD on the 
> original gnuradio project hardware and have since then made lots more boards 
> including a cyclone 3 board.
>
> Here is a possible hardware configuration:
> USB 3.0 transceiver IC or USB 3.0 microcontroller
> Altera Cyclone3 FPGA
> highspeed DAC/ADC
>
> If we use just a single channel ADC and DAC (ie half a USRP v1) then we can 
> get away with a smaller/cheaper FPGA and have a cheaper/simpler board that 
> can be paralleled if needed (ie. two boards hooked up to USB 3.0)

The idea of USB3 is nice for the future, but I don't think there are
enough peripherals out there yet to make a good board.  I can't really
find anything that's not completely preliminary and somewhat cheap.
I'd like to propose what I think may be a good compromise.

Altera Cyclone IV EP4CGX15 FPGA, Analog Devices AD9861 MxFE, USB2
microcontroller (for reprogramming the FPGA) in an ExpressCard/34
format.  The FPGA has a hard PCIe 1.1 x1 lane with a hard IP core for
PCIe connectivity.  The PCIe interface has an extremely low latency
and pretty high throughput - ~200MB/sec full duplex (after overhead
and whatnot).  The FPGA would be mostly empty since the PCIe core is
hard.  If the F169 package is used, it should be compatible with up to
a EP4CGX30 which would give 80 18x18 multipliers and over 1Mbit of
embedded memory.  The ExpressCard format can fit into desktop PC's
with simple and cheap adapters, or into laptops which have ExpressCard
slots.

ExpressCard has both an x1 PCIe connection as well as a USB 2.0
connection.  I imagine a small USB 2.0 micro used for FPGA
configuration and, possibly, a secondary way for samples to enter/exit
the FPGA for different use cases (similar to the original USRP).  But
the main purpose would be for reconfiguration of the FPGA.

Frequency synthesis can be an optional part of the assembly.  I
imagine a relatively inexpensive VCTCXO (2ppm accuracy?) along with an
Si5338 clock synthesis chip.  The idea, though, is to be completely
optional for those who really want it.  Otherwise, the FPGA PLL's can
probably be good enough for most people.

For connectors, 2 HDMI (commodity and cheap, twisted pair, shielded
and rated to relatively high frequencies) - one for analog/baseband
signals, one for digital I2C/SPI comms.  Goes to a daughterboard
carrier which can hold the daughterboard and a digital IO port
expander for controlling the RX/TX IO [0:15] pins for the db
connectors.

I think the high bandwidth, low latency, and low CPU utilization of
PCIe is very attractive.  The main downside to the parts are the BGA
components which can be daunting for hobbyists, but toaster ovens with
PID controllers can really do a pretty amazing job.  I'm not sure if
this is a dealbreaker or not.

I'm very interested to hear other people's opinions as to proposed
interfaces, platforms, architectures, and connectivity.

Jamie, I hope you don't see this as a hijacking of your original
e-mail.  I am particularly interested in your response.

Brian