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Re: design rules / flatten layout
From: |
Steven Rubin |
Subject: |
Re: design rules / flatten layout |
Date: |
Tue, 29 Nov 2005 16:45:01 -0800 |
At 03:43 AM 11/29/2005, you wrote:
Thanks for this tool.
I try version 8.03 of the Electric VLSI Design System (Linux x86).
How about the bug "Technology editor cannot edit design rules."
What can I do to add a new technology with design rules?
The technology editor can create a Java source file that embodies the
technology. After this file has been written out, the design rules
can be added to the file so that, when built with Electric, the
technology has this information. However, you will have to read
other technology files to learn how to do this. I would NOT
recommend reading "mocmos.java" because that file implements design
rules in a very indirect way.
It would be nice not only to use the output-files of assura or
calibre but also read the input (technology) files?
Sorry, but that is not going to happen. In order to process Assura
or Calibre files, Electric must implement an entirely new DRC that
does CSG (Constructive Solid Geometry) operations. You are better
off simply running these DRC systems independently. Also, it is not
possible to read these files and build technologies in Electric (I've tried).
What do I have to do to flatten the layout, is it possible?
You can flatten layout by "extract"ing cell instances. However, it
is rarely needed, because all tools that want flat layout do the
flattening themselves.
-Steven Rubin