Re: compilation problem and other questions

[Tuukka Toivonen]

On Fri, 9 Nov 2001, Matteo Poletti wrote:

>I'm searching a tool which can sintetise from a behavioral description
>(VHDL or Verilog) to a cmos level. The circuits are not larger than 1000

I'm afraid that Electric is not capable to do that. At most it can
synthesize layout from a circuit schematic (with the Silicon Compiler
tool) but I haven't tried that.

There's a VLSI design system called Alliance that should be able to
synthesize layout from VHDL, but I believe it accepts only strictly
structural VHDL.

>/app/misc/electric-6.04 >make
>gcc -I/usr/openwin/include         -Isrc/include -c src/cons/conlay.c -o
>src/cons/conlay.o
>/usr/ccs/bin/as: "/var/tmp/ccYqNwdO.s", line 478: error: unknown opcode

You should tell what compiler and what system you're compiling it with.
It looks like you use gcc, "gcc --version" tells the version number.
>From "openwin" I'd guess you're on a Solaris.

I looks like the GCC compiler installation is broken in your system.
Can you compile any programs?

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