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Re: SOC design
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From: |
Scott L. Baker |
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Subject: |
Re: SOC design |
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Date: |
Thu, 26 Oct 2000 22:36:23 -0700 |
I have designed a custom microcontroller and prototyped
it in an FPGA. I want to convert this design into a std cell
ASIC using Electric. I would like to include 64k of SRAM
and 1K of ROM on the same die. Has anyone done a similar
project using Electric? Can anyone give me any advice?
Are there ROM/RAM IP or design tools available?
Thanks,
Scott Baker
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