config-patches
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

config.sub: Handle MIPS R3 and R5 ISA levels with CPU names


From: Maciej W. Rozycki
Subject: config.sub: Handle MIPS R3 and R5 ISA levels with CPU names
Date: Sat, 1 May 2021 01:15:08 +0200 (CEST)
User-agent: Alpine 2.21 (DEB 202 2017-01-01)

Complement binutils commit ae52f4830604 ("Add MIPS r3 and r5 support.") 
and recognize MIPS CPU patterns for the R3 and R5 ISA levels, used by 
GAS to set defaults.

* config.sub (mipsisa32r3, mipsisa32r3el, mipsisa32r5, mipsisa32r5el)
(mipsisa64r3, mipsisa64r3el, mipsisa64r5, mipsisa64r5el): Recognize.
* config-sub.data: Update accordingly.
---
Hi,

 Obviously someone missed this part when updating binutils long ago.  
Please apply.

  Maciej
---
 config.sub                |    4 ++++
 testsuite/config-sub.data |    8 ++++++++
 2 files changed, 12 insertions(+)

Index: config/config.sub
===================================================================
--- config.orig/config.sub
+++ config/config.sub
@@ -1204,9 +1204,13 @@ case $cpu-$vendor in
                        | mips64vr5900 | mips64vr5900el \
                        | mipsisa32 | mipsisa32el \
                        | mipsisa32r2 | mipsisa32r2el \
+                       | mipsisa32r3 | mipsisa32r3el \
+                       | mipsisa32r5 | mipsisa32r5el \
                        | mipsisa32r6 | mipsisa32r6el \
                        | mipsisa64 | mipsisa64el \
                        | mipsisa64r2 | mipsisa64r2el \
+                       | mipsisa64r3 | mipsisa64r3el \
+                       | mipsisa64r5 | mipsisa64r5el \
                        | mipsisa64r6 | mipsisa64r6el \
                        | mipsisa64sb1 | mipsisa64sb1el \
                        | mipsisa64sr71k | mipsisa64sr71kel \
Index: config/testsuite/config-sub.data
===================================================================
--- config.orig/testsuite/config-sub.data
+++ config/testsuite/config-sub.data
@@ -414,6 +414,10 @@ mipsisa32                                  
mipsisa32-unknown-elf
 mipsisa32el                                    mipsisa32el-unknown-elf
 mipsisa32r2                                    mipsisa32r2-unknown-elf
 mipsisa32r2el                                  mipsisa32r2el-unknown-elf
+mipsisa32r3                                    mipsisa32r3-unknown-elf
+mipsisa32r3el                                  mipsisa32r3el-unknown-elf
+mipsisa32r5                                    mipsisa32r5-unknown-elf
+mipsisa32r5el                                  mipsisa32r5el-unknown-elf
 mipsisa32r6                                    mipsisa32r6-unknown-elf
 mipsisa32r6-elf                                        mipsisa32r6-unknown-elf
 mipsisa32r6el                                  mipsisa32r6el-unknown-elf
@@ -422,6 +426,10 @@ mipsisa64                                  
mipsisa64-unknown-elf
 mipsisa64el                                    mipsisa64el-unknown-elf
 mipsisa64r2                                    mipsisa64r2-unknown-elf
 mipsisa64r2el                                  mipsisa64r2el-unknown-elf
+mipsisa64r3                                    mipsisa64r3-unknown-elf
+mipsisa64r3el                                  mipsisa64r3el-unknown-elf
+mipsisa64r5                                    mipsisa64r5-unknown-elf
+mipsisa64r5el                                  mipsisa64r5el-unknown-elf
 mipsisa64r6                                    mipsisa64r6-unknown-elf
 mipsisa64r6-elf                                        mipsisa64r6-unknown-elf
 mipsisa64r6el                                  mipsisa64r6el-unknown-elf



reply via email to

[Prev in Thread] Current Thread [Next in Thread]