[Commit-gnuradio] r10101 - gnuradio/trunk/usrp2/fpga/control_lib

[matt]

Author: matt
Date: 2008-12-03 23:12:51 -0700 (Wed, 03 Dec 2008)
New Revision: 10101

Modified:
   gnuradio/trunk/usrp2/fpga/control_lib/longfifo.v
   gnuradio/trunk/usrp2/fpga/control_lib/shortfifo.v
Log:
speed up the diagnostic signals, they were causing timing problems


Modified: gnuradio/trunk/usrp2/fpga/control_lib/longfifo.v
===================================================================
--- gnuradio/trunk/usrp2/fpga/control_lib/longfifo.v    2008-12-04 02:34:40 UTC 
(rev 10100)
+++ gnuradio/trunk/usrp2/fpga/control_lib/longfifo.v    2008-12-04 06:12:51 UTC 
(rev 10101)
@@ -15,8 +15,8 @@
      input clear,
      output full,
      output empty,
-     output [15:0] space,
-     output [15:0] occupied);
+     output reg [15:0] space,
+     output reg [15:0] occupied);
 
    // Read side states
    localparam    EMPTY = 0;
@@ -26,12 +26,6 @@
    reg [SIZE-1:0] wr_addr, rd_addr;
    reg [1:0]     read_state;
 
-   wire [SIZE-1:0] fullness = wr_addr - rd_addr;  // Approximate, for 
simulation only
-   assign occupied = {{16-SIZE{1'b0}},fullness};
-
-   wire [SIZE-1:0] free_space = rd_addr - wr_addr - 2;  // Approximate, for 
SERDES flow control
-   assign space = {{16-SIZE{1'b0}},free_space};
-         
    reg           empty_reg, full_reg;
    always @(posedge clk)
      if(rst)
@@ -43,7 +37,7 @@
 
    ram_2port #(.DWIDTH(WIDTH),.AWIDTH(SIZE))
      ram (.clka(clk),
-         .ena(1),
+         .ena(1'b1),
          .wea(write),
          .addra(wr_addr),
          .dia(datain),
@@ -118,5 +112,39 @@
 
    // assign full = ((rd_addr - 1) == wr_addr);
    assign full = full_reg;
+
+   //////////////////////////////////////////////
+   // space and occupied are for diagnostics only
+   // not guaranteed exact
+
+   localparam NUMLINES = (1<<SIZE)-2;
+   always @(posedge clk)
+     if(rst)
+       space <= NUMLINES;
+     else if(clear)
+       space <= NUMLINES;
+     else if(read & ~write)
+       space <= space + 1;
+     else if(write & ~read)
+       space <= space - 1;
    
+   always @(posedge clk)
+     if(rst)
+       occupied <= 0;
+     else if(clear)
+       occupied <= 0;
+     else if(read & ~write)
+       occupied <= occupied - 1;
+     else if(write & ~read)
+       occupied <= occupied + 1;
+   
+   /*
+   wire [SIZE-1:0] fullness = wr_addr - rd_addr;  // Approximate, for 
simulation only
+   assign occupied = {{16-SIZE{1'b0}},fullness};
+
+   wire [SIZE-1:0] free_space = rd_addr - wr_addr - 2;  // Approximate, for 
SERDES flow control
+   assign space = {{16-SIZE{1'b0}},free_space};
+    */  
+
+   
 endmodule // longfifo

Modified: gnuradio/trunk/usrp2/fpga/control_lib/shortfifo.v
===================================================================
--- gnuradio/trunk/usrp2/fpga/control_lib/shortfifo.v   2008-12-04 02:34:40 UTC 
(rev 10100)
+++ gnuradio/trunk/usrp2/fpga/control_lib/shortfifo.v   2008-12-04 06:12:51 UTC 
(rev 10101)
@@ -9,8 +9,8 @@
      input clear,
      output reg full,
      output reg empty,
-     output [4:0] space,
-     output [4:0] occupied);
+     output reg [4:0] space,
+     output reg [4:0] occupied);
    
    reg [3:0]     a;
    genvar        i;
@@ -57,7 +57,31 @@
 
    // NOTE will fail if you write into a full fifo or read from an empty one
 
-   assign space = full ? 0 : empty ? 16 : 15-a;
-   assign occupied = empty ? 0 : full ? 16 : a+1;
+   //////////////////////////////////////////////////////////////
+   // space and occupied are used for diagnostics, not 
+   // guaranteed correct
    
+   //assign space = full ? 0 : empty ? 16 : 15-a;
+   //assign occupied = empty ? 0 : full ? 16 : a+1;
+
+   always @(posedge clk)
+     if(rst)
+       space <= 16;
+     else if(clear)
+       space <= 16;
+     else if(read & ~write)
+       space <= space + 1;
+     else if(write & ~read)
+       space <= space - 1;
+   
+   always @(posedge clk)
+     if(rst)
+       occupied <= 0;
+     else if(clear)
+       occupied <= 0;
+     else if(read & ~write)
+       occupied <= occupied - 1;
+     else if(write & ~read)
+       occupied <= occupied + 1;
+      
 endmodule // shortfifo