[PATCH 02/16] mescc: Add r0-cmp-r1 instruction.

[W. J. van der Laan]

* module/mescc/compile.scm: Make use of a new r0-cmp-r1 instruction.
This instruction is used to compare two registers and set the flags
accordingly. In current architectures this is the same as r0-r1, but for
RISCV it will be different. RISC-V does not have condition flags so
(until a better solution) we are going to emulate them there.
* module/mescc/armv4/as.scm: Add r0-cmp-r1 as alias of r0-r1.
* module/mescc/i386/as.scm: Same.
* module/mescc/x86_64/as.scm: Same.
---
 module/mescc/armv4/as.scm  |  1 +
 module/mescc/compile.scm   | 10 +++++-----
 module/mescc/i386/as.scm   |  1 +
 module/mescc/x86_64/as.scm |  1 +
 4 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/module/mescc/armv4/as.scm b/module/mescc/armv4/as.scm
index 
e30338d37803914da62675d6528655b792664a87..b953d8c3695b7fb2f4e3c565ca99d8d70eb5c577
 100644
--- a/module/mescc/armv4/as.scm
+++ b/module/mescc/armv4/as.scm
@@ -615,6 +615,7 @@
     (r0->r1 . ,armv4:r0->r1)
     (r0->r1-mem . ,armv4:r0->r1-mem)
     (r0-and-r1 . ,armv4:r0-and-r1)
+    (r0-cmp-r1 . ,armv4:r0-r1)
     (r0-mem->r1-mem . ,armv4:r0-mem->r1-mem)
     (r0-or-r1 . ,armv4:r0-or-r1)
     (r0-r1 . ,armv4:r0-r1)
diff --git a/module/mescc/compile.scm b/module/mescc/compile.scm
index 
579de2cebbaadc6179c053227e6533d06068ad58..9efbd933c9581008e0f47c72ce4df1f21241d233
 100644
--- a/module/mescc/compile.scm
+++ b/module/mescc/compile.scm
@@ -1234,13 +1234,13 @@
                 (info (free-register info)))
            info))

-        ((eq ,a ,b) (let ((info ((binop->r info) a b 'r0-r1)))
+        ((eq ,a ,b) (let ((info ((binop->r info) a b 'r0-cmp-r1)))
                       (append-text info (wrap-as (as info 'zf->r)))))

         ((ge ,a ,b)
          (let* ((type-a (ast->type a info))
                 (type-b (ast->type b info))
-                (info ((binop->r info) a b 'r0-r1))
+                (info ((binop->r info) a b 'r0-cmp-r1))
                 (test->r (if (or (unsigned? type-a) (unsigned? type-b)) 
'ae?->r 'ge?->r))
                 (info (append-text info (wrap-as (as info test->r))))
                 (info (append-text info (wrap-as (as info 'test-r)))))
@@ -1249,7 +1249,7 @@
         ((gt ,a ,b)
          (let* ((type-a (ast->type a info))
                 (type-b (ast->type b info))
-                (info ((binop->r info) a b 'r0-r1))
+                (info ((binop->r info) a b 'r0-cmp-r1))
                 (test->r (if (or (unsigned? type-a) (unsigned? type-b)) 'a?->r 
'g?->r))
                 (info (append-text info (wrap-as (as info test->r))))
                 (info (append-text info (wrap-as (as info 'test-r)))))
@@ -1264,7 +1264,7 @@
         ((le ,a ,b)
          (let* ((type-a (ast->type a info))
                 (type-b (ast->type b info))
-                (info ((binop->r info) a b 'r0-r1))
+                (info ((binop->r info) a b 'r0-cmp-r1))
                 (test->r (if (or (unsigned? type-a) (unsigned? type-b)) 
'be?->r 'le?->r))
                 (info (append-text info (wrap-as (as info test->r))))
                 (info (append-text info (wrap-as (as info 'test-r)))))
@@ -1273,7 +1273,7 @@
         ((lt ,a ,b)
          (let* ((type-a (ast->type a info))
                 (type-b (ast->type b info))
-                (info ((binop->r info) a b 'r0-r1))
+                (info ((binop->r info) a b 'r0-cmp-r1))
                 (test->r (if (or (unsigned? type-a) (unsigned? type-b)) 'b?->r 
'l?->r))
                 (info (append-text info (wrap-as (as info test->r))))
                 (info (append-text info (wrap-as (as info 'test-r)))))
diff --git a/module/mescc/i386/as.scm b/module/mescc/i386/as.scm
index 
0b786e5be71685b08d17274535b070fb3e3b2267..c9a248d2dce3c2552dad6f6a075de3362a3b5f7f
 100644
--- a/module/mescc/i386/as.scm
+++ b/module/mescc/i386/as.scm
@@ -617,6 +617,7 @@
     (r0->r1 . ,i386:r0->r1)
     (r0->r1-mem . ,i386:r0->r1-mem)
     (r0-and-r1 . ,i386:r0-and-r1)
+    (r0-cmp-r1 . ,i386:r0-r1)
     (r0-mem->r1-mem . ,i386:r0-mem->r1-mem)
     (r0-or-r1 . ,i386:r0-or-r1)
     (r0-r1 . ,i386:r0-r1)
diff --git a/module/mescc/x86_64/as.scm b/module/mescc/x86_64/as.scm
index 
7e438c6cd31b080698d6ec2c96e02911d33ae32f..4ea89f93cf0bc38ff93124abb91c9ec48b713601
 100644
--- a/module/mescc/x86_64/as.scm
+++ b/module/mescc/x86_64/as.scm
@@ -751,6 +751,7 @@
     (r0->r1 . ,x86_64:r0->r1)
     (r0->r1-mem . ,x86_64:r0->r1-mem)
     (r0-and-r1 . ,x86_64:r0-and-r1)
+    (r0-cmp-r1 . ,x86_64:r0-r1)
     (r0-mem->r1-mem . ,x86_64:r0-mem->r1-mem)
     (r0-or-r1 . ,x86_64:r0-or-r1)
     (r0-r1 . ,x86_64:r0-r1)
--
2.27.0