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Re: [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code
From: |
Samuel Thibault |
Subject: |
Re: [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code |
Date: |
Sun, 12 Feb 2023 17:11:53 +0100 |
User-agent: |
NeoMutt/20170609 (1.8.3) |
Sergey Bugaev, le dim. 12 févr. 2023 14:10:42 +0300, a ecrit:
> It seems that GCC expects TLS on x86_64 to be done relative to %fs, not %gs,
> so
> that's what I attempted to do in tls.h. The main thing missing there is the
> ability to actually set (and read) the %fs base address of a thread. It is my
> understanding (but note that I have no idea what I'm talking about) that on
> x86_64 the segment descriptors (as in GDT/LDT) are not used for this,
segmentation has somewhat disappeared in x86_64, yes.
> and instead the address can be set by writing to a MSR. Linux exposes
> the arch_prctl (ARCH_[GS]ET_[FG]S) syscall for this; so maybe GNU Mach
> could also have an explicit routine for this, perhaps like this:
>
> routine i386_set_fgs_base (
> target_thread: thread_t;
> which: int;
> value: rpc_vm_address_t);
Indeed.
> We should not need a getter routine, because one can simply inspect the target
> thread's state (unless, again, I misunderstand things horribly).
For 16bit fs/gs values we could read them from userland yes. But for
fs/gs base, the FSGSBASE instruction is not available on all 64bit
processors. And ATM in THREAD_TCB we want to be able to get the base of
another thread.
> diff --git a/sysdeps/mach/hurd/x86_64/static-start.S
> b/sysdeps/mach/hurd/x86_64/static-start.S
> new file mode 100644
> index 00000000..982d3d52
> --- /dev/null
> +++ b/sysdeps/mach/hurd/x86_64/static-start.S
> @@ -0,0 +1,27 @@
> +/* Type of the TCB. */
> +typedef struct
> +{
> + void *tcb; /* Points to this structure. */
> + dtv_t *dtv; /* Vector of pointers to TLS data. */
> + thread_t self; /* This thread's control port. */
> + int __glibc_padding1;
> + int multiple_threads;
> + int gscope_flag;
> + uintptr_t sysinfo;
> + uintptr_t stack_guard;
> + uintptr_t pointer_guard;
> + long __glibc_padding2[2];
> + int private_futex;
? Isn't that rather feature_1 ?
> + int __glibc_padding3;
> + /* Reservation of some values for the TM ABI. */
> + void *__private_tm[4];
> + /* GCC split stack support. */
> + void *__private_ss;
> + /* The lowest address of shadow stack. */
> + unsigned long long int ssp_base;
> +
> + /* Keep these fields last, so offsets of fields above can continue being
> + compatible with the x86_64 NPTL version. */
> + mach_port_t reply_port; /* This thread's reply port. */
> + struct hurd_sigstate *_hurd_sigstate;
> +
> + /* Used by the exception handling implementation in the dynamic loader. */
> + struct rtld_catch *rtld_catch;
> +} tcbhead_t;
> +
> +/* GCC generates %fs:0x28 to access the stack guard. */
> +_Static_assert (offsetof (tcbhead_t, stack_guard) == 0x28,
> + "stack guard offset");
> +/* libgcc uses %fs:0x70 to access the split stack pointer. */
> +_Static_assert (offsetof (tcbhead_t, __private_ss) == 0x70,
> + "split stack pointer offset");
Indeed. Could you perhaps also add them to the i386 tls.h?
> +/* FIXME */
> +# define __LIBC_NO_TLS() 0
We'll want an efficient way to know whether we have configured TLS
indeed. At worse we can make it a global variable.
> +/* The TCB can have any size and the memory following the address the
> + thread pointer points to is unspecified. Allocate the TCB there. */
> +# define TLS_TCB_AT_TP 1
> +# define TLS_DTV_AT_TP 0
> +
Also copy the comment above TCB_ALIGNMENT.
> +/* Install new dtv for current thread. */
> +# define INSTALL_NEW_DTV(dtvp) THREAD_SETMEM (THREAD_SELF, dtv, dtvp)
> +/* Return the address of the dtv for the current thread. */
> +# define THREAD_DTV() THREAD_GETMEM (THREAD_SELF, dtv)
While at it, try to make the i386 version use that too?
Samuel
- [RFC PATCH mig 8/12] Set max type alignment to sizeof(long), (continued)
- [RFC PATCH glibc 5/12] htl: Fix semaphore reference, Sergey Bugaev, 2023/02/12
- [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code, Sergey Bugaev, 2023/02/12
- Re: [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code,
Samuel Thibault <=
- Re: [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code, Sergey Bugaev, 2023/02/12
- Re: [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code, Samuel Thibault, 2023/02/12
- Re: [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code, Florian Weimer, 2023/02/12
- Re: [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code, Samuel Thibault, 2023/02/12
- Re: [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code, Florian Weimer, 2023/02/12
- Re: [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code, Samuel Thibault, 2023/02/12
- Re: [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code, Sergey Bugaev, 2023/02/12
- Re: [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code, Samuel Thibault, 2023/02/12
- Re: [RFC PATCH glibc 11/12] hurd, htl: Add some x86_64-specific code, Sergey Bugaev, 2023/02/12
Re: [RFC PATCH 0/12] Towards glibc on x86_64-gnu, Samuel Thibault, 2023/02/12