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[Bug binutils/4835] New: movd insn isn't changed to movq in x86-64 disas
From: |
ht at inter7 dot jp |
Subject: |
[Bug binutils/4835] New: movd insn isn't changed to movq in x86-64 disassembler |
Date: |
24 Jul 2007 01:09:50 -0000 |
With REX.W prefix, "movd" insn changes to "movq" in 64 bit mode, Intel syntax.
But disassembler still prints movd and doesn't recognize REX.W prefix.
% objdump -v
GNU objdump (GNU Binutils) 2.17.50.20070723
Copyright 2007 Free Software Foundation, Inc.
This program is free software; you may redistribute it under the terms of
the GNU General Public License version 3 or (at your option) any later version.
This program has absolutely no warranty.
% cat movq.s
.byte 0x48, 0x0F, 0x6E, 0x00
.byte 0x48, 0x0F, 0x7E, 0x00
.byte 0x48, 0x66, 0x0F, 0x6E, 0x00
.byte 0x48, 0x66, 0x0F, 0x7E, 0x00
% as movq.s -o movq.o
% objdump -dw -Mintel,x86-64 --section="LC_SEGMENT.__TEXT.__text" movq.o
movq.o: file format mach-o-le
Disassembly of section LC_SEGMENT.__TEXT.__text:
0000000000000000 <LC_SEGMENT.__TEXT.__text>:
0: 48 0f 6e 00 movd mm0,QWORD PTR [rax]
4: 48 0f 7e 00 movd QWORD PTR [rax],mm0
8: 48 rex.W
9: 66 0f 6e 00 movd xmm0,DWORD PTR [rax]
d: 48 rex.W
e: 66 0f 7e 00 movd DWORD PTR [rax],xmm0
In Intel CPU manual, it's written:
MOVD/MOVQ
Opcode Instruction
REX.W + 0F 6E /r MOVQ mm, r/m64
REX.W + 0F 7E /r MOVQ r/m64, mm
REX.W + 66 0F 6E /r MOVQ xmm, r/m64
REX.W + 66 0F 7E /r MOVQ r/m64, xmm
--
Summary: movd insn isn't changed to movq in x86-64 disassembler
Product: binutils
Version: 2.18 (HEAD)
Status: NEW
Severity: normal
Priority: P2
Component: binutils
AssignedTo: unassigned at sources dot redhat dot com
ReportedBy: ht at inter7 dot jp
CC: bug-binutils at gnu dot org
GCC host triplet: i686-apple-darwin
http://sourceware.org/bugzilla/show_bug.cgi?id=4835
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- [Bug binutils/4835] New: movd insn isn't changed to movq in x86-64 disassembler,
ht at inter7 dot jp <=