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[avr-libc-commit] [2412] bug #35971, #36053: add missing register and bi

From: Pitchumani
Subject: [avr-libc-commit] [2412] bug #35971, #36053: add missing register and bit definitions, update interrupt vector name for attiny2313a/ 4313.
Date: Thu, 20 Mar 2014 11:21:20 +0000 
Revision: 2412
          http://svn.sv.gnu.org/viewvc/?view=rev&root=avr-libc&revision=2412
Author:   pitchumani
Date:     2014-03-20 11:21:20 +0000 (Thu, 20 Mar 2014)
Log Message:
-----------
bug #35971, #36053: add missing register and bit definitions, update interrupt 
vector name for attiny2313a/ 4313.

Ticket Links:
------------
    http://savannah.gnu.org/bugs/?35971

Modified Paths:
--------------
    trunk/avr-libc/ChangeLog
    trunk/avr-libc/NEWS
    trunk/avr-libc/include/avr/iotn2313a.h
    trunk/avr-libc/include/avr/iotn4313.h

Modified: trunk/avr-libc/ChangeLog
===================================================================
--- trunk/avr-libc/ChangeLog    2014-03-20 09:17:57 UTC (rev 2411)
+++ trunk/avr-libc/ChangeLog    2014-03-20 11:21:20 UTC (rev 2412)
@@ -1,5 +1,18 @@
 2014-03-20  Pitchumani Sivanupandi <address@hidden>
 
+       Submitted by Barnabas Bodnar, Pitchumani Sivanupandi
+       Fix for bug #36053: Declaration of the register USIBR missing for 
ATtiny 
+       2313a/4313
+       Fix for bug #35971: attiny4313 (2313a) pin-change interrupts 
PCINT[0...2]
+       vect etc.
+       * include/avr/iotn2313a.h: Add USIBR register and bit definitions.
+       Update bit definitions for UCSRC, GIFR, GIMSK. Add PCMSK0 and GIFR as
+       alias name for PCMSK and EIFR respectively. Add alias names for USART 
and 
+       PCINT interrupt vectors.
+       * include/avr/iotn4313.h: Same.
+
+2014-03-20  Pitchumani Sivanupandi <address@hidden>
+
        Submitted by Morten Engelhardt Olsen <address@hidden>
        Fix for bug #38516: Missing TWI and UCSR1D definitions for ATmega16/32 
U4
        * include/avr/iom16u4.h: Add TWBR,TWSR,TWAR,TWDR,TWCR,TWAMR and UCSR1D

Modified: trunk/avr-libc/NEWS
===================================================================
--- trunk/avr-libc/NEWS 2014-03-20 09:17:57 UTC (rev 2411)
+++ trunk/avr-libc/NEWS 2014-03-20 11:21:20 UTC (rev 2412)
@@ -7,6 +7,8 @@
   [#35226] Online-documentation broken - [...]
   [#35398] assert doesn't work unless stdlib.h is also included
   [#35539] stdlib.h does not provide EXIT_SUCCESS et al.
+  [#35971] attiny4313 (2313a) pin-change interrupts PCINT[0...2] vect etc
+  [#36053] Declaration of the register USIBR missing for ATtiny2313a/4313
   [#36410] avr/boot.h: poisoned SPMCR for ATmega128
   [#36454] string.h: Error for long long in C90
   [#36581] avr-libc: pgmspace.h is not ANSI compliant

Modified: trunk/avr-libc/include/avr/iotn2313a.h
===================================================================
--- trunk/avr-libc/include/avr/iotn2313a.h      2014-03-20 09:17:57 UTC (rev 
2411)
+++ trunk/avr-libc/include/avr/iotn2313a.h      2014-03-20 11:21:20 UTC (rev 
2412)
@@ -51,6 +51,16 @@
 
 /* Registers and associated bit numbers. */
 
+#define USIBR _SFR_IO8(0x000)
+#define USIBR0 0
+#define USIBR1 1
+#define USIBR2 2
+#define USIBR3 3
+#define USIBR4 4
+#define USIBR5 5
+#define USIBR6 6
+#define USIBR7 7
+
 #define DIDR _SFR_IO8(0x001)
 #define AIN0D 0
 #define AIN1D 1
@@ -68,8 +78,13 @@
 #define USBS 3
 #define UPM0 4
 #define UPM1 5
-#define UMSEL 6
+#define UMSEL0 6
+#define UMSEL1 7
 
+/* When in MSPIM mode */
+#define UCPHA 1
+#define UDORD 2
+
 #define PCMSK1 _SFR_IO8(0x004)
 #define PCINT8 0
 #define PCINT9 1
@@ -304,6 +319,7 @@
 #define EEAR6 6
 
 #define PCMSK _SFR_IO8(0x020)
+#define PCMSK0 _SFR_IO8(0x020)
 #define PCINT0 0
 #define PCINT1 1
 #define PCINT2 2
@@ -529,12 +545,17 @@
 #define TOIE1 7
 
 #define EIFR _SFR_IO8(0x03A)
-#define PCIF 5
+#define GIFR _SFR_IO8(0x03A)
+#define PCIF1 3
+#define PCIF2 4
+#define PCIF0 5
 #define INTF0 6
 #define INTF1 7
 
 #define GIMSK _SFR_IO8(0x03B)
-#define PCIE 5
+#define PCIE1 3
+#define PCIE2 4
+#define PCIE0 5
 #define INT0 6
 #define INT1 7
 
@@ -563,16 +584,24 @@
 #define TIMER1_OVF_vect      _VECTOR(5)  /* Timer/Counter1 Overflow */
 #define TIMER0_OVF_vect_num  6
 #define TIMER0_OVF_vect      _VECTOR(6)  /* Timer/Counter0 Overflow */
+#define USART0_RX_vect_num  7
+#define USART0_RX_vect      _VECTOR(7)  /* USART, Rx Complete */
 #define USART_RX_vect_num  7
-#define USART_RX_vect      _VECTOR(7)  /* USART, Rx Complete */
+#define USART_RX_vect      _VECTOR(7)  /* alias */
+#define USART0_UDRE_vect_num  8
+#define USART0_UDRE_vect      _VECTOR(8)  /* USART Data Register Empty */
 #define USART_UDRE_vect_num  8
-#define USART_UDRE_vect      _VECTOR(8)  /* USART Data Register Empty */
+#define USART_UDRE_vect      _VECTOR(8)  /* alias */
+#define USART0_TX_vect_num  9
+#define USART0_TX_vect      _VECTOR(9)  /* USART, Tx Complete */
 #define USART_TX_vect_num  9
-#define USART_TX_vect      _VECTOR(9)  /* USART, Tx Complete */
+#define USART_TX_vect      _VECTOR(9)  /* alias */
 #define ANA_COMP_vect_num  10
 #define ANA_COMP_vect      _VECTOR(10)  /* Analog Comparator */
+#define PCINT0_vect_num  11
+#define PCINT0_vect      _VECTOR(11)  /* Pin Change Interrupt Request 0 */
 #define PCINT_B_vect_num  11
-#define PCINT_B_vect      _VECTOR(11)  /* Pin Change Interrupt Request B */
+#define PCINT_B_vect      _VECTOR(11)  /* alias */
 #define TIMER1_COMPB_vect_num  12
 #define TIMER1_COMPB_vect      _VECTOR(12)  /*  */
 #define TIMER0_COMPA_vect_num  13
@@ -583,14 +612,18 @@
 #define USI_START_vect      _VECTOR(15)  /* USI Start Condition */
 #define USI_OVERFLOW_vect_num  16
 #define USI_OVERFLOW_vect      _VECTOR(16)  /* USI Overflow */
+#define EEPROM_Ready_vect_num  17
+#define EEPROM_Ready_vect      _VECTOR(17)  /* EEPROM Ready */
 #define WDT_OVERFLOW_vect_num  18
 #define WDT_OVERFLOW_vect      _VECTOR(18)  /* Watchdog Timer Overflow */
+#define PCINT1_vect_num  19
+#define PCINT1_vect      _VECTOR(19)  /* Pin Change Interrupt Request 1 */
+#define PCINT_A_vect_num  19
+#define PCINT_A_vect      _VECTOR(19)  /* alias */
+#define PCINT2_vect_num  20
+#define PCINT2_vect      _VECTOR(20)  /* Pin Change Interrupt Request 2 */
 #define PCINT_D_vect_num  20
-#define PCINT_D_vect      _VECTOR(20)  /* Pin Change Interrupt Request D */
-#define EEPROM_Ready_vect_num  17
-#define EEPROM_Ready_vect      _VECTOR(17)  /*  */
-#define PCINT_A_vect_num  19
-#define PCINT_A_vect      _VECTOR(19)  /* Pin Change Interrupt Request A */
+#define PCINT_D_vect      _VECTOR(20)  /* alias */
 
 #define _VECTOR_SIZE 2 /* Size of individual vector. */
 #define _VECTORS_SIZE (21 * _VECTOR_SIZE)

Modified: trunk/avr-libc/include/avr/iotn4313.h
===================================================================
--- trunk/avr-libc/include/avr/iotn4313.h       2014-03-20 09:17:57 UTC (rev 
2411)
+++ trunk/avr-libc/include/avr/iotn4313.h       2014-03-20 11:21:20 UTC (rev 
2412)
@@ -51,6 +51,16 @@
 
 /* Registers and associated bit numbers. */
 
+#define USIBR _SFR_IO8(0x000)
+#define USIBR0 0
+#define USIBR1 1
+#define USIBR2 2
+#define USIBR3 3
+#define USIBR4 4
+#define USIBR5 5
+#define USIBR6 6
+#define USIBR7 7
+
 #define DIDR _SFR_IO8(0x001)
 #define AIN0D 0
 #define AIN1D 1
@@ -68,8 +78,13 @@
 #define USBS 3
 #define UPM0 4
 #define UPM1 5
-#define UMSEL 6
+#define UMSEL0 6
+#define UMSEL1 7
 
+/* When in MSPIM mode */
+#define UCPHA 1
+#define UDORD 2
+
 #define PCMSK1 _SFR_IO8(0x004)
 #define PCINT8 0
 #define PCINT9 1
@@ -509,6 +524,7 @@
 #define PGWRT 2
 #define RFLB 3
 #define CTPB 4
+#define RSIG 5
 
 #define TIFR _SFR_IO8(0x038)
 #define OCF0A 0
@@ -529,12 +545,17 @@
 #define TOIE1 7
 
 #define EIFR _SFR_IO8(0x03A)
-#define PCIF 5
+#define GIFR _SFR_IO8(0x03A)
+#define PCIF1 3
+#define PCIF2 4
+#define PCIF0 5
 #define INTF0 6
 #define INTF1 7
 
 #define GIMSK _SFR_IO8(0x03B)
-#define PCIE 5
+#define PCIE1 3
+#define PCIE2 4
+#define PCIE0 5
 #define INT0 6
 #define INT1 7
 
@@ -563,16 +584,24 @@
 #define TIMER1_OVF_vect      _VECTOR(5)  /* Timer/Counter1 Overflow */
 #define TIMER0_OVF_vect_num  6
 #define TIMER0_OVF_vect      _VECTOR(6)  /* Timer/Counter0 Overflow */
+#define USART0_RX_vect_num  7
+#define USART0_RX_vect      _VECTOR(7)  /* USART, Rx Complete */
 #define USART_RX_vect_num  7
-#define USART_RX_vect      _VECTOR(7)  /* USART, Rx Complete */
+#define USART_RX_vect      _VECTOR(7)  /* alias */
+#define USART0_UDRE_vect_num  8
+#define USART0_UDRE_vect      _VECTOR(8)  /* USART Data Register Empty */
 #define USART_UDRE_vect_num  8
-#define USART_UDRE_vect      _VECTOR(8)  /* USART Data Register Empty */
+#define USART_UDRE_vect      _VECTOR(8)  /* alias */
+#define USART0_TX_vect_num  9
+#define USART0_TX_vect      _VECTOR(9)  /* USART, Tx Complete */
 #define USART_TX_vect_num  9
-#define USART_TX_vect      _VECTOR(9)  /* USART, Tx Complete */
+#define USART_TX_vect      _VECTOR(9)  /* alias */
 #define ANA_COMP_vect_num  10
 #define ANA_COMP_vect      _VECTOR(10)  /* Analog Comparator */
+#define PCINT0_vect_num  11
+#define PCINT0_vect      _VECTOR(11)  /* Pin Change Interrupt Request 0 */
 #define PCINT_B_vect_num  11
-#define PCINT_B_vect      _VECTOR(11)  /* Pin Change Interrupt Request B */
+#define PCINT_B_vect      _VECTOR(11)  /* alias */
 #define TIMER1_COMPB_vect_num  12
 #define TIMER1_COMPB_vect      _VECTOR(12)  /*  */
 #define TIMER0_COMPA_vect_num  13
@@ -583,14 +612,18 @@
 #define USI_START_vect      _VECTOR(15)  /* USI Start Condition */
 #define USI_OVERFLOW_vect_num  16
 #define USI_OVERFLOW_vect      _VECTOR(16)  /* USI Overflow */
+#define EEPROM_Ready_vect_num  17
+#define EEPROM_Ready_vect      _VECTOR(17)  /* EEPROM Ready */
 #define WDT_OVERFLOW_vect_num  18
 #define WDT_OVERFLOW_vect      _VECTOR(18)  /* Watchdog Timer Overflow */
+#define PCINT1_vect_num  19
+#define PCINT1_vect      _VECTOR(19)  /* Pin Change Interrupt Request 1 */
+#define PCINT_A_vect_num  19
+#define PCINT_A_vect      _VECTOR(19)  /* alias */
+#define PCINT2_vect_num  20
+#define PCINT2_vect      _VECTOR(20)  /* Pin Change Interrupt Request 2 */
 #define PCINT_D_vect_num  20
-#define PCINT_D_vect      _VECTOR(20)  /* Pin Change Interrupt Request D */
-#define EEPROM_Ready_vect_num  17
-#define EEPROM_Ready_vect      _VECTOR(17)  /*  */
-#define PCINT_A_vect_num  19
-#define PCINT_A_vect      _VECTOR(19)  /* Pin Change Interrupt Request A */
+#define PCINT_D_vect      _VECTOR(20)  /* alias */
 
 #define _VECTOR_SIZE 2 /* Size of individual vector. */
 #define _VECTORS_SIZE (21 * _VECTOR_SIZE)
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