Re: [avr-gcc-list] interrupts

[Ben L. Titzer]

On Mar 17, 2005, at 2:00 PM, Jamie Morken wrote:

> Hi,
>
> When in an interrupt service routine, and another interrupt is 
> triggered (ie. timer overflow) how does avr-gcc know to handle that 
> other interrupt once the current interrupt exits?  Does it go right to 
> the next interrupt?
>
> I am using the 16bit timer1 to do PWM code. OCR1A is set to the timer1 
> overflow interrupt, and it turns the dutycycle on, and sets the PWM 
> frequency.
>
> OCR1B is set to the timer1 output compare interrupt and it turns the 
> dutycycle off, its valid range is zero to OCR1A for 100% dutycycle.
>
> When I have these two interrupts triggering very close together (ie at 
> a high PWM frequency when OCR1A is a small number) the AVR will lock 
> up.  I guess this is because there is not enough time to execute both 
> interrupt service routines, so I have put a check in the code to make 
> sure that the two interrupts have a minimum amount of time between 
> them being called and it seems to work fine.
>
> What other kinds of conditions are important to keep in mind to avoid 
> intermittent lock ups of the AVR when using interrupts?  I need to 
> make sure that the AVR doesn't reset, as it will be controlling a lot 
> of inertia (me at 10MPH+ on a dynamically balanced scooter) in real 
> time! :)

BTW, I don't trust my own code enough to control something I cannot 
outrun.

-B

> cheers,
> Jamie Morken
>
>
>
>
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