Re: [avr-gcc-list] Old bug - ordering of 16 bit assignments

[Brian Dean]

On Mon, Feb 28, 2005 at 09:33:08AM -0800, David Gay wrote:

> I would point out that, as far as the C language is concerned, this
> is not a bug: there is no guarantee as to which order the bytes of a
> multi-byte entity are written in.

I would tend to disagree with this, since the compiler generates
incorrect code in this case.  To claim otherwise is to claim that GCC
does not support memory mapped register access, yet it clearly does.
It even optimizes the access to an i/o instruction when it knows that
the address is actually in the I/O space.  Incidentally, it correctly
gets the order right in that case, just not when thte I/O space is
accessed through the SRAM mapping.

I do agree that the C language does not specify these details such as
the order in which bytes are written.  In fact, it would be a C
language bug to specify that since the correct answer depends on what
the underlying architecture requires.

In the case of the AVR, the undlerlying architecture requires that the
bytes to be written high-byte first, followed by low for I/O registers
mapped into the RAM space.  Since the order doesn't matter for actual
SRAM, the safe thing for the compiler to do is to write _all_ 16-bit
memory writes high byte, followed by low byte.

Similarly, 16 bit reads need to be done low-byte, followed by high
byte.

-Brian
-- 
Brian Dean
BDMICRO - ATmega128 Based MAVRIC Controllers
http://www.bdmicro.com/