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RE: [avr-gcc-list] question about SBI and CBI from avr-gcc


From: Theodore A. Roth
Subject: RE: [avr-gcc-list] question about SBI and CBI from avr-gcc
Date: Sun, 28 Nov 2004 21:53:41 -0800 (PST)

On Mon, 29 Nov 2004, Ben Mann wrote:

> The AVR assembly instructions for sbi/cbi only work for a limited set of
> registers (0 <= A <= 31), which accounts for a few cases where we look at
> the .lst file and scratch our collective heads.
>
> In addition, from my observations, winavr will generate the shorter/faster
> of sbi/cbi and read/modify/write based on how many bits are being set.
>
> Ie,
>
> PORTA |= _BV(PA0)|_BV(PA1)|_BV(PA2)|_BV(PA3);
>
> is clearly more efficient as 3 instructions (in/ori/out) than as 4 sbi
> instructions.
>
> A single change of porta "might" become an sbi instruction, but then that's
> based on whether PORTA is in the lower 32 I/O registers on your specific
> device...

The above is true.

One other gotcha: compiling with/without optimization.

Consider the following:

address@hidden:~$ cat foo.c
#include <avr/io.h>

int foo (void)
{
        PORTB |= _BV (PB4);
}
address@hidden:~$ avr-gcc -mmcu=atmega128 -c -o foo.o foo.c
address@hidden:~$ avr-objdump -d foo.o

foo.o:     file format elf32-avr

Disassembly of section .text:

00000000 <foo>:
   0:   cf 93           push    r28
   2:   df 93           push    r29
   4:   cd b7           in      r28, 0x3d       ; 61
   6:   de b7           in      r29, 0x3e       ; 62
   8:   80 91 38 00     lds     r24, 0x0038
   c:   80 61           ori     r24, 0x10       ; 16
   e:   80 93 38 00     sts     0x0038, r24
  12:   df 91           pop     r29
  14:   cf 91           pop     r28
  16:   08 95           ret
address@hidden:~$ avr-gcc -mmcu=atmega128 -Os -c -o foo.o foo.c
address@hidden:~$ avr-objdump -d foo.o

foo.o:     file format elf32-avr

Disassembly of section .text:

00000000 <foo>:
   0:   c4 9a           sbi     0x18, 4 ; 24
   2:   08 95           ret

---
Ted Roth
PGP Key ID: 0x18F846E9
Jabber ID: address@hidden


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