Re: [uracoli-devel] Question regarding LQI and ED values [Update]

[Joerg Wunsch]

As Eric Jennings wrote:

> > Well, how to put it politely? ;-)
> 
> You were very polite.

Thanks. :)

It's not always simple to find the right words in a foreign language.

> > Whoever designed that PCB appears to have never done any UHF design
> > before.

> I haven't done any UHF design either.

Neither did I, before I got involved with the Atmel transceivers.
(But being a ham radio amateur, I've got some RF background already
before, albeit not in the upper UHF range.)

The more important it is to study layout recommendations in particular
from the vendors, and that's what I accuse the one who designed the
Sparkfun board for: they didn't even *try* to follow the layout
recommendation from the balun vendor (Johanson Technology), when their
job would have been as simple as copying the recommendation from the
datasheet into their layout.  This would also have made it obvious
that proper RF connections require a bit more thought than just
ensuring everything has *some* connection satisfying the netlist and
the ERC check.

During a discussion on avrfreaks.net about a couple of years ago, I
ran a short "design study" for how *I* would start with designing an
ATmega128RFA1 prototype board:

http://www.avrfreaks.net/index.php?name=PNphpBB2&file=viewtopic&t=94891&start=20#724170

(Note that this board has never been produced and tested, it's really
an attempt only to demonstrate my own ideas in the discussion.)

What I did was to manually design all the RF area, and the crystal
connection of the transceiver.  Then, I left the exercise of
connecting all the digital IOs to their header pins to the
autorouter. ;-)  The result is not aesthetically pleasant, but I'm
quite positive the RF part will perform a lot better than the Sparkfun
board does.

I recently made a really low-cost design, targetted as a development
platform for a workshop where people were taught some basic steps in
embedded programming:

http://uracoli.nongnu.org/clt2012/

Note that this board was really designed with minimalistic hardware
effort in mind.  Leaving out the output filter circuitry is not really
recommended but still usable, at least to maintain the ETSI
requirements.  (To increase the safety margin for spurious emissions,
we mandated the users should reduce the Tx power to -5 dBm at most,
which was still plenty for such a simple gaming and learning device.)

Also, in order to meet the timeline to order the batch of our PCBs (we
needed 15 pairs of boards at an acceptable price, which requires quite
a few weeks of lead-time), I have not been able to really fine-tune
the antenna circuitry on the prototype PCBs before starting the full
PCB batch.  Later on, it turned out shortening the antenna to an
overall width of 40 mm (by simply scratching off a bit of copper on
each side, or by drilling a couple of holes), radiated energy could be
improved by another 10 dB, without any much impact on the radiated
harmonics.

> I also reviewed Dresden Elektronik's manual for their rfa1 board,
> and see how they tuned the RF circuit to ensure 50Ω with inductors.
> It would be ideal to see the board layout file for the DE board, but
> looks like they're not open-sourced.

The Dresden Elektronik boards are not open, but if you order one of
them, you could still study their layout principles.

> Regardless, every board design will probably require its own
> specific tuning.  I'll keep both the ground vias and the 50Ω tuning
> in mind when laying out the next revision of our board.

It doesn't matter much whether your traces are 50 Ω or 70 Ω.  First,
they are still relatively short, second, the power loss even for such
a (by "gut feeling") gross impedance mismatch is almost neglicible.
Remember that you need 6 dB more in order to get across twice the
distance, so for a cheap mass-production device, you won't care for
the last single decibel to get out of the circuitry.  (But getting 10
dB more out of it as in my Tic-Tac-Toe boards is, of course, worth the
effort.)

The first and most important thing is: good grounding.  Of course, if
you can afford a multilayer PCB, that's always quite easy, because
you've got a full ground plane inside, and can tie any partial ground
plane on the top layer to the full GND plane inside by a number of
vias through a really low impedance path without any much problems.

If you only have two layers, the job is a bit more challenging.  Try
maintaining large ground areas on at least one side.  The more they
are distributed in both, X and Y dimensions, the smaller is their
inductance.  Spend as many GND vias as possible in the vicinity of the
RF circuitry, to make the ground connections a distributed net rather
than small wires.  Just keep the 1 nH / mm in mind.  1 nH is 15 Ω
impedance.  (Now you might understand why Johanson really wants *four*
GND vias at their balun.)

The RFN/RFP pins are a *symmetric* input/output, so all circuitry
attaching to them should be kept symmetric; either till a symmetric
antenna, or to the balun that converts the signal to asymmetric.

50 Ω traces on standard 1.5 mm FR4 PCBs are quite wide (almost 1 mm),
which is impractical to handle for short connections.  But short
connections don't care about the impedance mismatch, so better keep
them short rather than trying to force them into 50 Ω.  Only
electrically long connections (more than about lambda/10, but remember
the shortening factor of the PCB material [*]) have to be matched to
50 Ω.

If you follow that, I'm sure the first prototype will already become a
success, which only needs minimal rework for the second revision
(after making some RF measurements).

[*] As the lambda/2 dipole antenna in the Tic-Tac-Toe board turned out
to have an optimal match with 40 mm dimension, this means lambda/10 on
1.5 mm FR4 is approximately 8 mm.
-- 
cheers, J"org               .-.-.   --... ...--   -.. .  DL8DTL

http://www.sax.de/~joerg/                        NIC: JW11-RIPE
Never trust an operating system you don't have sources for. ;-)