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Re: [Qemu-trivial] [PATCH] target-i386: fix order of checks in cpu_get_p
Re: [Qemu-trivial] [PATCH] target-i386: fix order of checks in cpu_get_phys_page_debug
Fri, 5 Apr 2013 15:07:43 +0200
On Thu, Apr 04, 2013 at 07:13:03PM -0400, Brendan Dolan-Gavitt wrote:
> In target-i386 cpu_get_phys_page_debug, the CR4_PAE bit is checked
> before CR0_PG. This means that if paging is disabled but the PAE bit has
> been set in CR4, cpu_get_phys_page_debug will return the wrong result
> (it will try to translate the address as virtual rather than using it as
> a physical address). This patch fixes that by moving the CR0_PG check to
> the beginning of the function.
> This shows up when booting the Linux kernel on amd64 with "-d in_asm".
> The kernel turns on the PAE bit in CR4 before turning on paging, and so
> QEMU's disassembler will fail because it will try to walk the page
> tables to fetch code even though paging is disabled. The symptom is
> incorrect disassembly and some "Disassembler disagrees with translator
> over instruction decoding" messages.
> This was also reported as bug #1163065.
> Signed-off-by: Brendan Dolan-Gavitt <address@hidden>
> target-i386/helper.c | 121
> 1 file changed, 64 insertions(+), 57 deletions(-)
Sorry, not trivial :).