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Re: [Qemu-stable] [PATCH for-2.11 2/2] accel/tcg: Handle atomic accesses


From: Peter Maydell
Subject: Re: [Qemu-stable] [PATCH for-2.11 2/2] accel/tcg: Handle atomic accesses to notdirty memory correctly
Date: Mon, 20 Nov 2017 14:47:58 +0000

On 20 November 2017 at 14:27, Richard Henderson <address@hidden> wrote:
> On 11/20/2017 02:27 PM, Peter Maydell wrote:
>> -    return (void *)((uintptr_t)addr + tlbe->addend);
>> +    hostaddr = (void *)((uintptr_t)addr + tlbe->addend);
>> +
>> +    memory_notdirty_write_prepare(ndi, ENV_GET_CPU(env), addr,
>> +                                  qemu_ram_addr_from_host_nofail(hostaddr),
>> +                                  1 << s_bits);
>
> These calls should be conditional on TLB_NOTDIRTY being set.
> We certainly don't need to do anything like taking a lock otherwise.

We only take the lock if the dirty flag is set for the
physical memory, which it won't be if TLB_NOTDIRTY wasn't set...

> Perhaps an extra bool in NDI, like
>
>   ndi->active = false;
>   if (unlikely(tlb_addr & TLB_NOTDIRTY)) {
>       ndi->active = true;
>       memory_notdirty_write_prepare(ndi, ...);
>   }
>
> and
>
> #define ATOMIC_MMU_CLEANUP \
> do { \
>   if (unlikely(ndi->active)) { \
>      memory_notdirty_write_complete(ndi); \
>   } \
> } while (0)

...but yes, we could skip the whole thing if the TLB entry
isn't marked notdirty.

(Having NDI be "mostly opaque apart from this one thing" is a
little ugly, though.)

thanks
-- PMM



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