Re: [Qemu-riscv] [Qemu-devel] [PATCH] sifive_prci: Read and write PRCI registers

[no-reply]

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: address@hidden
Subject: [Qemu-devel] [PATCH] sifive_prci: Read and write PRCI registers
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]               patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
ba8be4dcb6 sifive_prci: Read and write PRCI registers

=== OUTPUT BEGIN ===
ERROR: that open brace { should be on the previous line
#35: FILE: hw/riscv/sifive_prci.c:29:
+    switch(addr)
+    {

ERROR: space required before the open parenthesis '('
#35: FILE: hw/riscv/sifive_prci.c:29:
+    switch(addr)

ERROR: that open brace { should be on the previous line
#54: FILE: hw/riscv/sifive_prci.c:48:
+    switch(addr)
+    {

ERROR: space required before the open parenthesis '('
#54: FILE: hw/riscv/sifive_prci.c:48:
+    switch(addr)

ERROR: trailing whitespace
#72: FILE: hw/riscv/sifive_prci.c:66:
+            s->plloutdiv = (uint32_t) val64; $

total: 5 errors, 0 warnings, 115 lines checked

Commit ba8be4dcb6c4 (sifive_prci: Read and write PRCI registers) has style 
problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
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