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Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the numb
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From: |
Alistair Francis |
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Subject: |
Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts |
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Date: |
Wed, 21 Nov 2018 10:59:46 -0800 |
On Wed, Nov 21, 2018 at 10:56 AM Logan Gunthorpe <address@hidden> wrote:
>
>
>
> On 2018-11-21 11:49 a.m., Alistair Francis wrote:
> > Agreed. It's the same number as the last interrupt in the QEMU SiFive
> > U machine. So that is where it came from.
>
> Ok, can we have a comment for that?
I don't think we really need a comment. It's just a made up number. It
just has to be higher then the actual number of used interrupts. It
can be changed in the future if required.
Alistair
>
> Logan
- [Qemu-riscv] [PATCH for-3.2 v7 0/6] Connect a PCIe host and graphics support to RISC-V, Alistair Francis, 2018/11/21
- [Qemu-riscv] [PATCH for-3.2 v7 3/6] hw/riscv/virt: Connect the gpex PCIe, Alistair Francis, 2018/11/21
- [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts,
Alistair Francis <=
- Re: [Qemu-riscv] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, Logan Gunthorpe, 2018/11/21
[Qemu-riscv] [PATCH for-3.2 v7 4/6] riscv: Enable VGA and PCIE_VGA, Alistair Francis, 2018/11/21
[Qemu-riscv] [PATCH for-3.2 v7 2/6] hw/riscv/virt: Adjust memory layout spacing, Alistair Francis, 2018/11/21
[Qemu-riscv] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Alistair Francis, 2018/11/21